The Economic Times (India)
중도 성향
IT/기술
IT/기술 · "SCRUTINY" · 총 15건
필터 보기현재 지수
50.3
0 = 부정 우세
50 = 중립
100 = 긍정 우세
최근 7일 기준 79,587건을 분석한 결과, 뉴스 심리지수는 50.2(균형)입니다. 긍정 4,203건(5.3%)·중립 73,321건(92.1%)·부정 2,063건(2.6%)이며, 중립 비중이 뚜렷하게 높습니다. 성향 지수는 종합 15.3(중도 균형)입니다.
Call for ‘clear and truthful account’ comes amid questions about the Reform leader’s property spending The Labour party has written to Nigel Farage urging him to stop “evading reasonable scrutiny” over the £5m personal gift he received from the Thailand-based crypto billionaire Christopher Harborne. The letter coincides with approval of a planning application that reveals the Reform leader’s plans to transform a dilapidated Kent property into a luxury beachfront residence. Continue reading...
ESPN may have some explaining to do.
Hyperscalers have come under scrutiny for their impact on water quality and availability.
THE operations and effectiveness of the Western Nigeria Security Network, WNSN, code-named Amotekun, have come under scrutiny. The post INSECURITY IN YORUBALAND:Is Amotekun still effective in S-West? appeared first on Vanguard News.
OpenAI CEO and co-founder Sam Altman tried to distance himself from the artificial intelligence industry's massive lobbying efforts this cycle as scrutiny mounts over the millions of dollars the sector is throwing into the midterms. Shortly after meeting with lawmakers on Capitol Hill on Wednesday, Altman was asked about OpenAI's involvement in primaries across the...
Google, Microsoft, and other hyperscalers have come under scrutiny for their impact on water quality and availability.
A cybersecurity disclosure has placed infrastructure linked to JEE Advanced 2026 under scrutiny after researcher Rylen Anil alleged that a cloud storage configuration exposed thousands of candidate-related records and admit-card PDFs. IIT Roorkee, the organising institute, acknowledged the configuration issue and said corrective action was being taken. The development comes amid recent cybersecurity concerns involving CBSE's On-Screen Marking system and NTA's re-examination portal, highlighting growing attention on data security across India's examination ecosystem.
The government has pledged to gather more input before proceeding with its 1.6-billion-baht TH-AI Passport project, which has drawn intense scrutiny focused on transparency, value for money and data privacy.
NEW YORK, June 2 — Meta is facing scrutiny after security researchers found that its AI‑powered support chatbot co...
Almost 50 per cent of young adults in six major economies think AI romantic companionship will improve human happiness through emotional support in the next decade, the results of a large survey suggested on Monday. The percentage dropped progressively across older age categories to just a quarter of people aged 55 and over, according to the research shared exclusively with AFP. Leaps in AI development have seen people turn to chatbots as confidants and lovers, while advancements in robotics are helping produce more sophisticated sex dolls — raising questions over the impact on human relationships. The survey of nearly 10,000 people across the United States, Japan, Germany, Britain, Indonesia and Hong Kong provides a snapshot of this “rapidly changing moral landscape”, pollsters YouGov said. It also shows “a profound ideological split between Western and Asian markets”, with the latter seemingly more accepting of technologically enabled sex and romance. In terms of emotional support, 48pc of all respondents aged 18-24 and 47pc of 25 to 34-year-olds said they thought “AI intimacy companions” — a category ranging from chatbots to sex dolls — would improve human happiness in the next decade. When the same question was asked focusing on deeper connection and sexual wellbeing, the figures came in at 32pc and 38pc respectively. On both counts, older people were less optimistic. The psychological impact of chatbots on vulnerable people has been under scrutiny, with the deaths of several teenagers linked to AI use by their families. Geographic split YouGov and the media company that commissioned the research, Tokyo-based Star X Gen, told AFP they were surprised by the regional disparity. In Indonesia, 50pc of people — of all ages — said they thought AI companions would improve connection and sexual wellness. It was 34pc in Hong Kong and 24pc in Japan, declining to 20pc in the United States, 15pc in Germany and just 9pc in Britain. “While Western audiences largely view synthetic intimacy as a threat to authentic human closeness, Asian audiences appear increasingly ready to integrate AI into their personal and physical lives,” said YouGov’s Philippe Chan. While the use of AI chatbots for romance and sex is becoming more commonplace, their embodiment in robots or dolls is at a more nascent stage. Across all 9,912 respondents, only 17pc said they would consider using an “AI intimacy doll”, compared to 59pc who said they would not. Across the board, younger adults were more likely than older ones to consider using a doll — and in Japan and Germany, the number of younger people who would think about trying a doll was nearly double the national average. “While the global (general population) remains wary, the next generation is actively redefining the boundaries of companionship,” the report said. In Japan, over a third of younger adults said they believed AI dolls could provide a sense of love, outnumbering those who disagreed.
The proposed TH-AI Passport project has become one of the most debated digital policy initiatives in recent years. Framed as a national investment in human capital and artificial intelligence capability, the scheme has drawn scrutiny over its scale, procurement process and value for money.
Tesla says its Full Self-Driving software is up to 10 times safer than human drivers, but the figures the company uses to support its claims don't withstand scrutiny
[Capital FM] A wave of AI-generated satire and heated political commentary is sweeping across Kenyan social media platforms following reports that the United States is weighing plans to manage some Ebola exposure cases outside its borders, including a potential arrangement involving Kenya, a development that has triggered legal objections, diplomatic scrutiny, and an explosive online reaction.
I have been an application-specific IC (ASIC) designer for almost three decades. Over that time, I’ve moved through the full academic trajectory, from graduate student to full professor; later, I transitioned to industry after an unsuccessful stint at entrepreneurship. When I made the switch to the private sector in 2019, I began focusing on a critically important aspect of the electronic industry: silicon intellectual property. As much as 80 percent of the physical area in today’s most advanced chips is occupied by blocks that aren’t made for specific products or even designed by the consumer-facing companies that built them. Instead, chipmakers draw heavily on established silicon IP from companies like Arm, Cadence, Rambus, Synopsys, and the company I work for, Silicon Creations. Throughout my career, I’ve designed chips for very different purposes, including enabling the research program in my academic lab and expanding the IP portfolio of my company. When I joined Silicon Creations, I had no idea how differently the industry approaches IC design and encountered a steep learning curve. Initially, it seemed that much of my two decades of academic research and training did not directly translate to the role. I had to learn new skills and adopt a new mindset. Today, demand for ASICs is rapidly growing, driven by the need for specialized chips in the automotive sector, AI applications, and more. By one market estimate, the ASIC market is expected to grow from US $23.4 billion to $38.8 billion by 2033, and the semiconductor industry as a whole is projected to hit $1 trillion by 2030. The industry needs more chip designers—but if you’re coming from an academic background as I did, there are a few things you’ll need to know. Different goals lead to different strategies The differences between industry and academe begin with a divergence in purpose. In academia, my primary objective was to generate new knowledge: to propose a novel circuit technique, validate an unconventional architecture, or explore the limits of performance in a given domain. A successful chip is one that demonstrates a concept. In industry, it is not nearly enough to prove that something can work. The goal is to ensure that it works reliably, repeatedly, and at scale. Success is measured not by novelty but by whether the silicon meets specifications, yields as expected in production, and supports a competitive product delivered on schedule. This leads to a stark contrast in risk tolerance. Academic designs often deliberately push into unproven territory, where even partial success can yield valuable insight. In industry, however, we systematically minimize risk. The cost of failure makes first-time silicon success a central requirement—especially at advanced technology nodes, where the lithography masks used to transfer circuit designs onto silicon wafers alone can cost tens of millions of dollars. As a result, industry design flows are built around eliminating uncertainty through conservative margins, extensive validation, and careful reuse of proven solutions. “Academia explores the design space, asking what is possible, while industry exploits it, determining what is viable at scale.” This paradigm has existed since the 1970s, when application-specific chip design was established. However, the gulf between academia and industry has expanded since the mid-2010s, when FinFET technology, a 3D architecture using vertical “fins” of silicon, was widely adopted in industry. System designs are also becoming increasingly modular with the advent of chiplets. This fundamentally altered the economics and complexity of ASIC development, with design costs rising by almost an order of magnitude. Initiatives like Taiwan Semiconductor Manufacturing Co.’s University FinFET Program and new government-funded chip-design hubs now let some well-resourced universities design for more advanced architectures, but the technology is still out of reach for many academics. What the industry-academia split means in practice Consider a startup developing an ASIC. Its engineering team may have deep expertise in a particular algorithm, sensor interface, or system architecture, the features that define its competitive advantage. But it is unlikely to possess world-class expertise in every supporting function. Developing each of these blocks internally would require significant time, capital, and specialized talent. Doing so could delay market entry beyond the startup’s viability. Even large semiconductor companies face similar constraints. Advanced-node development demands intense focus. Allocating a team to redesign a standard interface block that has already been implemented elsewhere may be difficult to justify when differentiation lies at the system level, such as an inference chip’s ability to speed up neural network computations. The time it takes to move a new chip from conception to market and risk mitigation, not self-sufficiency, govern most decisions about in-house development versus outsourcing. The economics of advanced IC manufacturing reinforce this reality. When the development cost of a leading-edge chip reaches hundreds of millions of dollars, minimizing risk becomes a central design imperative. In this context, silicon IP emerged as a practical solution. Similar to how software developers rely on preexisting libraries rather than writing every function from scratch, ASIC designers license predesigned, preverified silicon blocks—such as processor cores, memory interfaces, and security engines—from highly specialized IP vendors. These blocks can then be integrated into larger, increasingly complex systems. Design scope, verification, and time horizons With the use of silicon IP, industry is able to widen the scope of its designs. Academic efforts tend to focus on block-level innovation: a new analog-to-digital converter architecture or an ultralow-noise amplifier, for instance. These designs typically abstract away many of the complexities of bringing a chip to market, such as packaging constraints, long-term reliability, and manufacturing yield. In industry, the focus shifts to system-level integration. Modern systems on chips, or SoCs, incorporate dozens or even hundreds of functional blocks. Managing signal integrity, timing, firmware interaction, and system-level validation becomes as critical as the design of any individual block. Verification philosophy also diverges sharply. In academia, the goal of verification is to demonstrate that the concept works under nominal conditions, which may not always reflect how it would perform in real applications. Even if only a fraction of fabricated chips from a multiproject wafer operates correctly, the design may still be considered a success if it validates the underlying idea. At my academic lab for instance, we used to receive 40 chips from a TSMC prototyping service and started testing them in batches of five. If the first five or 10 chips proved functional, we had already collected more than enough data for a publication. If some of them failed, we weren’t required to mention this when publishing the results. In industry, verification is exhaustive, critical, and often dominates the development schedule. Failures are measured in parts per million, and even rare anomalies are carefully analyzed and documented to identify root causes and prevent recurrence. When I started at Silicon Creations, I was surprised by the level of detail and scrutiny designs face. Differences in time horizons and economic constraints reinforce each of these contrasts. Academic projects operate on flexible timelines aligned with research and funding cycles. If I missed a deadline, I just had to wait for the next cycle. Industry projects are driven by fixed product schedules and market windows, frequently targeting costly leading-edge nodes to achieve competitive performance, power, and area efficiency. Missing a deadline can negate the value of an entire design and may have major financial consequences along the entire supply chain. In essence, academia explores the design space, asking what is possible, while industry exploits it, determining what is viable at scale. Both are indispensable, but they operate under fundamentally different definitions of success. As ASIC complexity continues to grow, understanding both perspectives will be essential for the next generation of engineers navigating the evolving semiconductor landscape. This article appears in the June 2026 print issue.