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Sem: New primitive for code understanding – not LSPs, but entities on top of Git
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🇺🇸 미국 · IT/기술 · "STANDING" · 총 20건
필터 보기현재 지수
50.0
0 = 부정 우세
50 = 중립
100 = 긍정 우세
최근 7일 기준 11,339건을 분석한 결과, 뉴스 심리지수는 50.0(균형)입니다. 긍정 1건(0.0%)·중립 11,337건(100.0%)·부정 1건(0.0%)이며, 중립 비중이 뚜렷하게 높습니다. 성향 지수는 종합 19.1(중도 균형)입니다.
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It should have been the final straw. The new power couple of editorial failure - Bari Weiss and Nick Bilton - had fired legendary 60 Minutes journalist Scott Pelley. Why? Because he dared to question the fact that CBS had installed sycophants in its top ranks. Instead of standing in solidarity, correspondents Lesley Stahl, Bill […]
New graduates’ careers are unfolding in an era when AI is not optional. The most successful engineers treat artificial intelligence as leverage, not competition. Here are seven tips to help keep young professionals in demand no matter how quickly the field’s tools evolve. 1. Master the fundamentals first. AI tools can help you code, but you still need strong fundamentals in: Data structures and algorithms for problem-solving. Operating systems, databases, and networking for system-level understanding. Core programming languages such as C++, Java, and Python. AI can autocomplete syntax, but if you don’t understand how things work under the hood, you’re likely to struggle to debug or optimize. 2. Learn how to work with AI, not against it. The best engineers will not try to out-code AI. Instead, they will learn to: Write clear prompts to generate better code snippets. Review and debug AI-generated code for accuracy, performance, and security. Use AI for productivity boosts while still exercising judgment. Think of AI as a teammate. The real skill is knowing when to trust it and when not to. 3. Build projects that showcase end-to-end thinking. Employers increasingly look for engineers who can design and build systems, not just solve problems. Create projects that show you can: Define requirements clearly. Use AI tools responsibly within the workflow. Deliver a product that scales and is maintainable. 4. Sharpen your system design skills early. Even junior engineers are now asked questions about basic system design with AI. Expect to explain to prospective employers: How you would responsibly integrate AI into a system. How to design fallbacks when AI fails. How to ensure scalability and reliability. 5. Develop strong communication skills. Today’s engineers don’t just code in isolation. You will be expected to: Explain design choices to teammates and stakeholders. Document decisions clearly. Collaborate effectively in cross-functional teams. This is one area where AI cannot replace you. Clear communication is a career accelerant. 6. Stay curious and keep learning. The tech industry moves fast, and AI is accelerating that pace. Cultivate habits such as: Following industry news, blogs, and open-source projects. Experimenting with new AI tools, frameworks, and libraries. Engaging in communities such as GitHub, IEEE Collabratec, LinkedIn, and Medium. Employers value engineers who keep themselves sharp and relevant. 7. Think beyond coding. AI will increasingly handle routine coding tasks. The differentiators for you will be: Problem-framing: Can you take a vague idea and turn it into a solution? Architectural judgment: Can you design systems that scale and last? Ethical awareness: Can you spot risks in AI use and address them responsibly? For more career advice, subscribe to the IEEE Spectrum Career Alert Newsletter. The biweekly newsletter features the latest information on jobs, education, management, and the engineering workplace.
"I am not the most optimistic person," Dr. Deepika Chopra told Fortune. But that's different from understanding how optimism works.
I have been an application-specific IC (ASIC) designer for almost three decades. Over that time, I’ve moved through the full academic trajectory, from graduate student to full professor; later, I transitioned to industry after an unsuccessful stint at entrepreneurship. When I made the switch to the private sector in 2019, I began focusing on a critically important aspect of the electronic industry: silicon intellectual property. As much as 80 percent of the physical area in today’s most advanced chips is occupied by blocks that aren’t made for specific products or even designed by the consumer-facing companies that built them. Instead, chipmakers draw heavily on established silicon IP from companies like Arm, Cadence, Rambus, Synopsys, and the company I work for, Silicon Creations. Throughout my career, I’ve designed chips for very different purposes, including enabling the research program in my academic lab and expanding the IP portfolio of my company. When I joined Silicon Creations, I had no idea how differently the industry approaches IC design and encountered a steep learning curve. Initially, it seemed that much of my two decades of academic research and training did not directly translate to the role. I had to learn new skills and adopt a new mindset. Today, demand for ASICs is rapidly growing, driven by the need for specialized chips in the automotive sector, AI applications, and more. By one market estimate, the ASIC market is expected to grow from US $23.4 billion to $38.8 billion by 2033, and the semiconductor industry as a whole is projected to hit $1 trillion by 2030. The industry needs more chip designers—but if you’re coming from an academic background as I did, there are a few things you’ll need to know. Different goals lead to different strategies The differences between industry and academe begin with a divergence in purpose. In academia, my primary objective was to generate new knowledge: to propose a novel circuit technique, validate an unconventional architecture, or explore the limits of performance in a given domain. A successful chip is one that demonstrates a concept. In industry, it is not nearly enough to prove that something can work. The goal is to ensure that it works reliably, repeatedly, and at scale. Success is measured not by novelty but by whether the silicon meets specifications, yields as expected in production, and supports a competitive product delivered on schedule. This leads to a stark contrast in risk tolerance. Academic designs often deliberately push into unproven territory, where even partial success can yield valuable insight. In industry, however, we systematically minimize risk. The cost of failure makes first-time silicon success a central requirement—especially at advanced technology nodes, where the lithography masks used to transfer circuit designs onto silicon wafers alone can cost tens of millions of dollars. As a result, industry design flows are built around eliminating uncertainty through conservative margins, extensive validation, and careful reuse of proven solutions. “Academia explores the design space, asking what is possible, while industry exploits it, determining what is viable at scale.” This paradigm has existed since the 1970s, when application-specific chip design was established. However, the gulf between academia and industry has expanded since the mid-2010s, when FinFET technology, a 3D architecture using vertical “fins” of silicon, was widely adopted in industry. System designs are also becoming increasingly modular with the advent of chiplets. This fundamentally altered the economics and complexity of ASIC development, with design costs rising by almost an order of magnitude. Initiatives like Taiwan Semiconductor Manufacturing Co.’s University FinFET Program and new government-funded chip-design hubs now let some well-resourced universities design for more advanced architectures, but the technology is still out of reach for many academics. What the industry-academia split means in practice Consider a startup developing an ASIC. Its engineering team may have deep expertise in a particular algorithm, sensor interface, or system architecture, the features that define its competitive advantage. But it is unlikely to possess world-class expertise in every supporting function. Developing each of these blocks internally would require significant time, capital, and specialized talent. Doing so could delay market entry beyond the startup’s viability. Even large semiconductor companies face similar constraints. Advanced-node development demands intense focus. Allocating a team to redesign a standard interface block that has already been implemented elsewhere may be difficult to justify when differentiation lies at the system level, such as an inference chip’s ability to speed up neural network computations. The time it takes to move a new chip from conception to market and risk mitigation, not self-sufficiency, govern most decisions about in-house development versus outsourcing. The economics of advanced IC manufacturing reinforce this reality. When the development cost of a leading-edge chip reaches hundreds of millions of dollars, minimizing risk becomes a central design imperative. In this context, silicon IP emerged as a practical solution. Similar to how software developers rely on preexisting libraries rather than writing every function from scratch, ASIC designers license predesigned, preverified silicon blocks—such as processor cores, memory interfaces, and security engines—from highly specialized IP vendors. These blocks can then be integrated into larger, increasingly complex systems. Design scope, verification, and time horizons With the use of silicon IP, industry is able to widen the scope of its designs. Academic efforts tend to focus on block-level innovation: a new analog-to-digital converter architecture or an ultralow-noise amplifier, for instance. These designs typically abstract away many of the complexities of bringing a chip to market, such as packaging constraints, long-term reliability, and manufacturing yield. In industry, the focus shifts to system-level integration. Modern systems on chips, or SoCs, incorporate dozens or even hundreds of functional blocks. Managing signal integrity, timing, firmware interaction, and system-level validation becomes as critical as the design of any individual block. Verification philosophy also diverges sharply. In academia, the goal of verification is to demonstrate that the concept works under nominal conditions, which may not always reflect how it would perform in real applications. Even if only a fraction of fabricated chips from a multiproject wafer operates correctly, the design may still be considered a success if it validates the underlying idea. At my academic lab for instance, we used to receive 40 chips from a TSMC prototyping service and started testing them in batches of five. If the first five or 10 chips proved functional, we had already collected more than enough data for a publication. If some of them failed, we weren’t required to mention this when publishing the results. In industry, verification is exhaustive, critical, and often dominates the development schedule. Failures are measured in parts per million, and even rare anomalies are carefully analyzed and documented to identify root causes and prevent recurrence. When I started at Silicon Creations, I was surprised by the level of detail and scrutiny designs face. Differences in time horizons and economic constraints reinforce each of these contrasts. Academic projects operate on flexible timelines aligned with research and funding cycles. If I missed a deadline, I just had to wait for the next cycle. Industry projects are driven by fixed product schedules and market windows, frequently targeting costly leading-edge nodes to achieve competitive performance, power, and area efficiency. Missing a deadline can negate the value of an entire design and may have major financial consequences along the entire supply chain. In essence, academia explores the design space, asking what is possible, while industry exploits it, determining what is viable at scale. Both are indispensable, but they operate under fundamentally different definitions of success. As ASIC complexity continues to grow, understanding both perspectives will be essential for the next generation of engineers navigating the evolving semiconductor landscape. This article appears in the June 2026 print issue.
A practical introduction to phase noise concepts, explaining how oscillator instability affects RF systems and how phase noise is measured, analyzed, and reported. What Attendees will Learn What phase noise is and why it matters — Learn how real-world oscillators differ from ideal ones, why short-term frequency instability arises, and why phase variations typically have a much greater impact than amplitude variations on system performance. How phase noise degrades system performance — Understand the most common effects of excessive phase noise: spectral regrowth, reciprocal mixing, and constellation rotation in digital communications. How phase noise is measured and reported — Explore the spectrum analyzer method and the cross-correlation technique, understand single sideband (SSB) phase noise plots and spot noise tables. What advanced phase noise measurements look like in practice — Discover additional measurement types including integrated phase noise, additive (residual) phase noise, pulsed signal phase noise, and amplitude noise. Download this free whitepaper now!
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During Tuesday’s Google I/O keynote, Demis Hassabis, the CEO of Google DeepMind, proclaimed that we are currently “standing in the foothills of the singularity.” It was a striking statement—the singularity is the theoretical future moment when AI rapidly exceeds human intelligence and dramatically transforms the world. But what struck me as I listened in the…
Over the next few decades, billions of autonomous, AI-powered robots will work alongside people in factories, perform tedious tasks in warehouses, care for the elderly, assist in unsafe disaster areas, deliver packages and food to our doorsteps, and eventually help out in our homes. Some will look like us, and many won’t. What is certain is that regardless of form factor, robots will all rely heavily on AI in order to deliver real-world value. In 2025, total investments in robotics companies reached a record US $40.7 billion, accounting for 9 percent of all venture funding. The multibillion dollar question therefore is this: What will it take for AI-powered robots to begin to have a serious economic impact? Many of today’s robotics and AI companies are making bold claims, such as that humanoid robots will soon be coming into our homes, but there’s still a big gap between promise and reality. The promise of robots that live and work alongside us has been the stuff of science fiction for a very long time. And while many programmers have tried to make that promise a reality, the physical world is just too complicated for traditional computer programs to handle the endless complexity it presents. Thanks to AI, robots are no longer being programmed—instead, they learn to operate in the real world. With enough practice, they can learn to perceive and understand the world around them, reason about that world, and use that reason and understanding to perform tasks that are useful, reliable, and safe. The two of us have worked at the forefront of AI and robotics for the last decade, as a Professor in Robotics at Oregon State University and Co-Founder of Agility Robotics, and as former CEO of the Everyday Robots moonshot at Google X. Our experience deploying AI-powered robots in real-world settings has given us a perspective on where AI can be used to great benefit in complex robotic systems in the near term and where we are still on the frontier of science fiction. We believe AI will enable an inflection point in robotics advances, but that it will be through the well-engineered application of coordinated systems of different AI tools rather than a single ChatGPT-style breakthrough. As the excitement around AI is matched only by the uncertainty of what will be possible, here are five hard truths that will define AI in robotics. 1. The YouTube-to-Reality Gap Is Real For years, we have been seeing videos on YouTube with humanoid robots performing amazing moves on everything from a dance floor to an obstacle course. The inside knowledge in robotics is to “never trust a YouTube robot video.” The gap between real robots that can perform real work in unstructured human environments and carefully scripted and edited robot performances remains significant. The latest performance to get a lot of attention was a martial arts show featuring Unitree humanoid robots performing with children at the Chinese 2026 Spring Festival Gala. While impressive, this falls into a long lineage of tightly scripted robotic performances, where everything has been carefully choreographed and planned in advance. The low-level controls, synchronization, and choreography were stunning, yet the Spring Gala robot performance showed a level of autonomy and intelligence much closer to industrial robots building cars in a factory than something that will show up in your living room any time soon. Seeing these kinds of demos nevertheless raises questions about where robotics really is. If robots can perform kung fu moves and do backflips and dance, why aren’t they also showing up on factory floors yet? And why can’t they do the dishes in my home after dinner? The simple answer is this: Making AI-powered robots capable of performing general tasks in varied human environments is still really hard. While impressive technological feats like those at the Spring Festival may make it look like we could be very close, the use of AI in these demos is only for low-level motor control (to keep the robots from falling over) and therefore is only a small part of the solution for robots to be general purpose in the real, unstructured spaces where we humans live and work. 2. Data Is An Unsolved Challenge Large Language Models (LLMs) like OpenAI’s ChatGPT and Anthropic’s Claude were initially trained on an internet-scale database of text. The world woke up one day in late 2022 to ChatGPT demonstrating that AI computers could suddenly “speak” to us in prose or verse and about seemingly any topic. LLMs have turned out to generalize well and are now able to take multimodal input (text, images, video) and produce multimodal output. Importantly, the corpus of training data was both enormous and human-generated, which are characteristics that form the gold standard for AI training. The fastest path to robots as part of everyday life may emerge through a range of robot forms performing increasingly sophisticated applications and employing a range of AI tools.Agility Robotics Giving AI a body (in the form of a robot), so that it can engage with people in the physical world, continues to be a very difficult and broadly unsolved problem. AI models for general-purpose robotics must simultaneously satisfy multiple, often conflicting, physical, geometric, and temporal limitations while operating in unstructured, dynamic environments. In order to generalize, robot models need to be trained on data gathered in a high-dimensional configuration space, where “dimensions” represent text, lighting conditions, degrees of freedom, joint limits, velocities, force, and safety boundaries, just to mention a few. Importantly, this must be good data—it must contain many examples from what amounts to an infinite number of possible configurations in the physical world. Since there are very few existing sources of data like this, approaches like teleoperation, video analysis, motion capture of humans, and self-exploration in simulation and in the real world are all seen as important ways to collect data. It’s a herculean task. For example, at Everyday Robots at Google X, we ran 240 million robot instances in our simulator over the course of 2022 to collect training data, mostly to train a trash-sorting model. Similar amounts of data will be needed for every skill to get to a similar level of capability, which is not yet human level. 3. There Will Be No Single Robot AI We are far away from a moment where a single AI model might allow general-purpose robots to live and work alongside us. General-purpose robots can have wheels or legs. They can have one, two, three, or more arms. Some have propellers and can fly, while others may be designed to operate under water. Some will drive on busy roads. The physical world is infinitely varied and complex. And then there are all the people and other animals that will be surrounding the robots. How do you train a model to operate a robot safely and reliably in all of these settings? The simple answer is: You don’t. At least not for quite some time. We believe the winning AI architecture leading to the next big breakthroughs in general-purpose robotics will be “agentic AI” for robots, which are high-level coordinating models that can reason, plan, use tools, and learn from outcomes to execute complex tasks with limited supervision. Agentic, high-level models running on robots will invoke a system of specialized ones for different types of tasks. We will likely soon see multiple robots collaborating and coordinating with each other through their onboard agentic AI models. AI tools are unlocking new and powerful capabilities in robotics, which in turn will enable new solutions and new markets. It’s encouraging to see these new models being made broadly available, some even as open-source solutions. This availability is akin to what happened with the internet: Real progress occurred when it became ubiquitous. We anticipate an inevitable democratization of complex behaviors in robotics with wide access to these AI tools and technologies. 4. Hardware Is Still Very Hard Robots are complex systems with many parts that all need to work together with great precision. For a robot to be useful and safe, every part of it must be coordinated, from its perception systems to the computer controlling it, all the way down to its individual actuators. Actuators—that is, the motors and gears—are a good example of an important part of the robot where what got us here won’t get us there. The actuators used at scale by most industrial robots will not work for robots that will operate in human environments. If these robots accidentally collide with an obstacle, the resulting impacts are harsh, forces are high, and things break. Humans don’t move in this way. We are far more compliant in how we interact with the world, and we’re constantly making contact with our environment and using that contact to help us accomplish things. Consider the challenge of inserting a key in a lock: Humans typically don’t do this by aligning the key perfectly with the keyhole. Instead, we just feel for the edge of the keyhole and jiggle the key in. Robots need to be able to operate in novel ways to achieve comparable capabilities by using a new class of actuators that are sensitive to force and able to have a compliant interaction with the environment. While these kinds of actuators do exist, they are not yet generally available at scale for robot systems designed to operate around people. 5. Real Value Comes From “Easy” Tasks There’s a big difference between tasks that look impressive and real-world tasks that provide value. Robotics is a perfect example of Moravec’s paradox, which states that tasks that are hard for humans are easy for computers (like multiplying two big numbers), and tasks easy for humans (like a toddler’s movements) are extremely difficult for computers and robots. Serving customers is an unforgiving reality check, because customers only care about solving the real problems they have. If we are to deploy AI-based robot solutions, they must outperform the way things are currently done while demonstrating reliable performance metrics and safety. Agility Robotics’ early work to deploy our humanoid robot Digit in customer locations led to the realization that our first obstacle was safety: Robots that balance and manipulate objects in human spaces bring new types of risk to the workplace. In the first humanoid deployments, physical barriers were necessary, and Agility kicked off a multi-year engineering effort to solve the safety challenge, touching nearly every aspect of robot design and relying heavily on new AI-based approaches to human detection and behavior control. Everyday Robots at Google deployed robots in 2019 that worked autonomously in office buildings doing chores like cleaning cafe tables and sorting trash. We quickly learned how “messy” and difficult the real world is for a robot. This experience informed the architecture and deployment of our AI systems while also gathering real-world data that could be combined with simulation data for training and improving models. This focus on creating a product to meet specific customer needs and deploying robots in real-world settings is the only way to inform the structure of the AI tools and infrastructure for near-term utility on a path towards long-term broader capability and generality. There will be no “aha” moment, no silver bullet algorithm, and no volume of data sufficient to produce a general-purpose robot without extensive real-world experience. AI Robots Are Coming, One Step at a Time As we look to the future, there is no doubt that the world is bringing AI into the physical world through robots. We are at the beginning of a “Cambrian explosion“ of useful, intelligent machines. We believe AI is not one tool, but a huge frontier of technical approaches that is unlocking new capabilities so powerful, they will define our economy moving forward. This will happen not in one single definitive moment, but as an ongoing set of small and large breakthroughs, where AI-driven robots begin to provide real value in a few tasks, and then a few more, with impacts unfolding across numerous $100 billion-plus markets that will dramatically improve the quality of our lives.
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The Coyl uses a coil design for the power cable, keeping it neat and taut between the desk and the wall. And instead of relying on boring levers to adjust the height, it has a nifty rotary dial.
In the late 1940s—when computer engineers were grappling with unreliable hardware and noisy transmission environments—a team of engineers inside a modest lab at the University of Manchester, England, confronted a problem so fundamental that it threatened the viability of digital computing itself. Machines could generate bits, but they could not reliably read them back. The inconsistent reading back of memory data did not initially present itself as a grand theoretical challenge. It showed up as something more mundane: inconsistent computing results. Engineers including Frederic C. Williams, Tom Kilburn, and G. E. (Tommy) Thomas traced the failures not to logic errors but to the physical behavior of the machines themselves. The team devised a technique for keeping a transmitter and a receiver synchronized without relying on a separate clock signal. Their innovation, known as Manchester code or phase encoding, encoded each bit with a transition in the middle of the bit period, effectively embedding timing information directly into the data stream to be a self-clocking signal. So, even if the signal degraded or the timing drifted slightly, the receiver could continually keep time based on those regular transitions. By eliminating the need for separate clocks and reducing synchronization errors, Manchester code made data transfer more robust across cables and circuits. Those qualities later made it a natural fit for technologies such as Ethernet and early data storage systems. Its self-clocking nature helped standardize how machines communicate, and it laid the groundwork for modern networking and digital communication protocols. On 13 April 2026, this breakthrough was honored with an IEEE Milestone plaque during a ceremony at the University of Manchester. Dignitaries from IEEE and the university attended the ceremony. Embedding timing in signals Those 1940s Manchester University engineers were working on systems that fed into the Manchester Mark I, one of the first practical stored-program machines. When troubles arose, they used oscilloscopes to probe signals. They found that electrical pulses did not arrive with consistent timing. Memory signals also blurred over time, making them harder to read, and when long runs of identical bits occurred, the waveform flattened into stretches with no transitions. That led to a crucial insight: The problem was not just detecting whether a signal was high or low; the system also lost track of when to sample the signal. Without reliable timing markers, even correctly formed signals were misread. Bits could effectively be lost or miscounted because the system fell out of sync. At first, the engineers tried to tame the hardware. They experimented with stabilizing circuits and more consistent pulse generation, attempting to impose a regular rhythm on an inherently unstable system. But the fixes proved fragile, and the electronics of the day could not maintain the required precision. So the Manchester group took a different approach. If the hardware could not provide a dependable clock, the signal itself would have to carry one. Instead of representing data as static levels, each bit changed state, with a guaranteed transition in the middle. Embedding timing in the signal reduced erratic behavior. Machines were suddenly able to reliably transmit, store, and read back data—an essential step toward practical stored-program computing. Making signals unmistakable The Manchester code addressed several issues at once. Regular transitions allowed continuous timing recovery. Transitions proved easier to detect than static levels, and long runs of identical bits no longer produced flat, ambiguous waveforms. Rather than fighting the imperfections of early electronics, the design worked with them. From lab curiosity to a global standard What began as a local solution in Manchester shaped digital communication systems for decades, including early Ethernet technology, for which timing and shared-medium communication were central challenges. According to Robert Metcalfe, a member of the team that built the first Ethernet system at Xerox PARC in 1973, he and his colleagues relied on Manchester code. “Manchester code solved a fundamental problem for us: timing,” Metcalfe says, explaining that each bit carried its own clock and removed the need for a global synchronized signal. That self-clocking property wasn’t the only benefit provided by the encoding scheme. On a shared coaxial cable, Manchester encoding did more than provide timing. Each transceiver left the medium undriven—effectively “off”—most of the time, allowing packets from other machines to pass without interference. Even during transmission, a station drove the signal only about half the time, leaving the line undriven during the other half of each bit cycle. This distinction—between a driven signal and an undriven line, rather than simple 1s and 0s—allowed receivers to recover both data and clock timing while also monitoring the cable for other activity. If a transceiver detected a signal when it expected the line to be undriven, the signal indicated that another station was transmitting at the same time. In other words, the system could detect collisions in real time and respond accordingly. The idea has proven durable far beyond local networks. Manchester code is being used aboard the Voyager spacecraft, which are now cruising through interstellar space—underscoring its reliability in extreme environments. The code also has found its way into everyday consumer electronics. Infrared remote controls for televisions and audio equipment commonly rely on Manchester code through protocols such as RC-5, developed by Philips in the early 1980s. The protocol encodes commands as timed infrared signals transmitted by a handset’s integrated circuit and LED, allowing devices to reliably interpret button presses even through noise and signal distortion. Manufacturers across Europe—and many in the United States—adopted the approach, extending Manchester code into the home. Why the Milestone matters An IEEE Milestone designation recognizes technologies with enduring impact. Manchester code qualifies because it solved a foundational timing problem at a critical moment in computing history. Without a way to embed timing in the data itself, early digital systems would have remained fragile and unreliable. Manchester code helped transform them into dependable machines, and it enabled much of today’s digital communication. “Manchester code solved a fundamental problem for us: timing,” —Robert Metcalfe, an Ethernet inventor Key participants at the plaque dedication ceremony included Tom Coughlin, 2024 IEEE president; Duncan Ivison, University of Manchester president and vice chancellor, and Nagham Saeed, chair of the IEEE U.K. and Ireland Section. Talks by Kees Schouhamer Immink (the 2017 IEEE Medal of Honor laureate probably best known for his work that made compact discs and other high-density digital media practical) and Peter Green (Manchester’s deputy dean for the engineering faculty) highlighted the code’s lasting impact on digital data storage and communications. The IEEE Milestone plaque for the Manchester code reads: “At this site in 1948–1949, Manchester code was invented for reliably encoding digital data stored on the Manchester Mark I computer’s magnetic drum. It became a standard for computer magnetic tapes and floppy disks and was used in digital communications, including the Voyager 1 and 2 spacecraft and early Ethernet networks. It found wide use in domestic remote controllers, radio frequency identification (RFID) tags, and many control network standards.” Administered by the IEEE History Center and supported by donors, the Milestone program recognizes outstanding technical developments worldwide. The IEEE U.K. and Ireland Section sponsored the nomination.
For years, the field of robotics has used the terms “dull, dirty, and dangerous” (DDD) to describe the types of tasks or jobs where robots might be useful—by doing work that’s undesirable for people. A classic example of a DDD job is one of “repetitive physical labor on a steaming hot factory floor involving heavy machinery that threatens life and limb.” But determining which human activities fit into these categories is not as straightforward as it seems. What exactly is a “dull” task, and who makes that assumption? Is “dirty” work just about needing to wash your hands afterwards, or is there also an aspect of social stigma? What data can we rely on to classify jobs as “dangerous?” Our recent work (which was not dull at all) tackles these questions and proposes a framework to help roboticists understand the job context for our technology. First, we did an empirical analysis of robotics publications between 1980 and 2024 that mention DDD and found that only 2.7 percent define DDD and only 8.7 percent provide examples of tasks or jobs. The definitions vary, and many of the examples aren’t particularly specific (for example, “industrial manufacturing,” “home care”). Next, we reviewed the social science literature in anthropology, economics, political science, psychology, and sociology to develop better definitions for “dull,” “dirty,” and “dangerous” work. Again, while it might seem intuitive which tasks to put into these buckets, it turns out that there are some underlying social, economic, and cultural factors that matter. Dangerous Work: Occupations or tasks that result in injury or risk of harm It’s possible to measure the danger of a task or job by using reported information. There are administrative records and surveys that provide numbers on occupational injury rates and hazardous risk factors. While that seems straightforward, it’s important to understand how this data was collected, reported, and verified. First, occupational injuries tend to be underreported, with some studies estimating up to 70 percent of cases missing in administrative databases. Second, injuries and risk factors are rarely disaggregated by characteristics like gender, migration status, formal/informal employment, and work activities. For example, because most personal protective equipment—such as masks, vests, and gloves—are sized for men, women in dangerous work environments face increased safety risks. These caveats are an opportunity for robotics to be helpful. If we went out and looked for it, we could probably find some less obviously dangerous work where robotics might be an important intervention, not to mention some groups that are disproportionately affected and would benefit from more workplace safety. Dirty Work: Occupations or tasks that are physically, socially, or morally tainted Colloquially, most people might think of dirty work as involving physical dirtiness, such as trash removal, cleaning, or dealing with hazardous substances. But social science literature makes clear that dirty work is also about stigma. Socially tainted jobs are often servile or involve interacting with stigmatized groups (for example, correctional officers), and morally tainted jobs include tasks that people commonly perceive as sinful, deceptive, or otherwise defying norms of civility (like a stripper or a collection agent). “Dirty work” is a social construct that can vary across time (like tattoo industry stigma in the United States) and culture (such as nursing in the U.S. versus in Bangladesh). One way to measure whether work is “dirty” is by using the closely related concept of occupational prestige, captured through quantitative surveys where people rank jobs. Another way to measure it is through qualitative data, like ethnographies and interviews. Similar to “dangerous,” we see some hidden opportunities for robotics in “dirty” work. But one of our more interesting takeaways from the data is that a lower-ranked job can be something that the workers themselves enjoy or find immense pride and meaning in. If we care about what tasks are truly undesirable, understanding this worker perspective is important. Dull Work: Occupations or tasks that are repetitive and lacking in autonomy When it comes to defining dull work, what matters most is workers’ own experiences. Outsiders can make a lot of false assumptions about what tasks have value and meaning. Sometimes things that seem boring or routine create the right conditions for developing skills and competence, such as the concentration needed for woodworking, or for socializing and support, when tasks are done alongside others. Instead of assuming that repetitive work is negative, it’s important to examine qualitative data on how people experience the work and what purpose it serves for them. DDD: An actionable framework In our paper, we propose a framework to help the robotics community explore how automation impacts individual jobs. For each term—dull, dirty, and dangerous—the framework gathers key pieces of information to reflect on what physical or social aspects of the task are, in fact, DDD. Worker perspective is an important part of all three considerations. The framework also emphasizes awareness of context—meaning the physical and social environment of an occupation and industry that can influence the DDD nature of a task. Our corresponding worksheet suggests existing data sources to draw on and encourages us to seek out multiple perspectives and consider potential sources of bias in the information. What makes tasks dull, dirty, or dangerous depends on the perspective of the humans doing those tasks.RAI Let’s take, for example, the waste and recycling industry. The world generates over 2 billion tonnes of waste annually, and this figure is expected to rise to nearly 4 billion tonnes by 2050. Intuitively, trash collection seems like a job that hits all the Ds. Going through our worksheet, we confirm that globally, workers in this industry face significant health hazards (dangerous), and waste collection is ranked as a low-status job (dirty), although interestingly, many workers take pride in providing this essential service. The job is also repetitive, but there are aspects that make it not dull. Specifically, workers cite the day-to-day interaction with their coworkers (which includes extensive insider vocabulary, work hacks, and mutual aid groups) and task variety as two of the most enjoyable aspects of the job. Task variety includes inspecting their vehicle and equipment, driving their truck, coordinating with crew members, lifting bins and bags, detecting incorrect sorting of waste, and unloading at the end destination. This finding matters because some types of robotic solutions will eliminate the parts of the job that workers most appreciate. For instance, the National Institute for Occupational Safety and Health (NIOSH) recommends the adoption of automated side loader trucks and collision avoidance systems. This innovation increases safety, which is great, but it also results in a sole worker operating a joystick in a cab, surrounded by sensor and camera surveillance. Instead, we should challenge ourselves to think of solutions that make jobs safer without making them terrible in a different way. To do this, we need to understand all aspects of what makes a job dull, dirty, or dangerous (or not). Our framework aims to facilitate this understanding. Finally, it’s important to note that DDD is only one of many possible approaches to classify what work might be better served by robots. There are lots of ways we could think about which types of tasks or jobs to automate (for example, economic impact or environmental sustainability). Given the popularity of DDD in robotics, we chose this common phrase as a starting point. We would love to see more work in this space, whether it’s data collection on DDD itself or the creation of other frameworks. At RAI, we believe that the fusion of robotics and social sciences opens a whole new world of information, perspectives, opportunities, and value. It fosters a culture of curiosity and mutual learning, and allows us to create actionable tools for anyone in robotics who cares about societal impact. Dull, Dirty, Dangerous: Understanding the Past, Present, and Future of a Key Motivation for Robotics, by Nozomi Nakajima, Pedro Reynolds-Cuéllar, Caitrin Lynch, and Kate Darling from the RAI Institute, was presented at the 21st ACM/IEEE International Conference on Human-Robot Interaction (HRI) in Edinburgh, Scotland.
This sponsored article is brought to you by Melbourne Convention Bureau (MCB) supported by Business Events Australia. Melbourne’s reputation as a global events city, from the Australian Open tennis and Formula 1 Australian Grand Prix to hosting NFL regular season games, now intersects with a different form of scale: large-scale compute, data-intensive research, and advanced engineering. Long recognized for delivering complex international events, the city is applying the same organisational capability to the infrastructure that underpins modern AI research, positioning Melbourne at the convergence of global convening and high-performance digital systems. Consistently ranked among the world’s most livable cities, Melbourne was named Time Out’s Best City in the World in 2026, the first Australian city to hold the title. Melbourne, Australia’s premier conference destination. Tourism Australia More materially for research and innovation, Melbourne is also the nation’s fastest‑growing capital, attracting increasing concentrations of engineering and technology talent, investment and international engagement. Australia’s artificial intelligence (AI) ecosystem is entering a new phase, defined less by isolated initiatives and more by the convergence of compute infrastructure, research intensity and international collaboration. Melbourne sits at this intersection. Melbourne’s trajectory highlights what enables research at scale: access to frontier-grade compute, proximity to industry-ready infrastructure, and repeated opportunities for global research communities to convene. Sovereign AI compute, expanding hyperscale data center campuses and a growing pipeline of international research-led conferences are reshaping the city’s research landscape. Together, these elements position Melbourne as a focal point for applied AI research, advanced engineering and data-intensive science. The growing global influence of AI engineering, underscored by NVIDIA CEO Jensen Huang receiving the 2026 IEEE Medal of Honor, reflects the scale of this shift. In Melbourne, these factors form a reinforcing research flywheel linking infrastructure, discovery and collaboration. Rather than focusing on startup density or short-term commercial output, Melbourne’s trajectory highlights what enables research at scale: access to frontier-grade compute, proximity to industry-ready infrastructure, and repeated opportunities for global research communities to convene. NVIDIA CEO Jensen Huang received the 2026 IEEE Medal of Honor.IEEE Sovereign AI foundations The most recent cornerstone of Melbourne’s AI capability is MAVERIC (Monash AdVanced Environment for Research and Intelligent Computing), Australia’s largest university-based AI supercomputer. Built and deployed by Monash University in partnership with NVIDIA, Dell Technologies, and CDC Data Centres, MAVERIC has been engineered specifically for large scale AI and data intensive science, with medical research representing a key priority. Indeed, in these regards MAVERIC has been designed to function as a Next Generation Trusted Research Environment thus ensuring that it is state-of-the-art and provides a safe and secure framework for the analysis of large sensitive datasets. Designed to support research projects including cancer and neurodegenerative disease detection, clinical trial analysis and drug discovery through to materials science and engineering, MAVERIC enables Australian researchers to train and evaluate large models domestically while keeping highly sensitive datasets secure and under national jurisdiction. This sovereign design is particularly relevant in fields such as medical research where privacy, regulation or intellectual property constraints limit the use of offshore cloud resources. Monash University Vice-Chancellor and President Professor Sharon Pickering with researchers [left to right] Professor Anton Peleg, Professor Victoria Mar, Professor James Whisstock, Vice-President (Strategy and Major Projects) Teresa Finlayson, and Professor Patrick Kwan.Eamon Gallagher (Australian Financial Review) Technically, the system reflects the latest shifts in high performance AI architecture. Built on NVIDIA GB200 NVL72 platforms and integrated using Dell’s rack scale infrastructure, MAVERIC employs closed loop liquid cooling to reduce water consumption compared with conventional air-cooled systems, aligning large scale compute growth with sustainability objectives while supporting high density, high throughput workloads. Professor James Whisstock, Deputy Dean Research of Monash’s Faculty of Medicine, Nursing, and Health Sciences commented, “MAVERIC provides a huge leap forward in our compute capability that will revolutionize our researchers’ ability to address the most challenging and important research questions across the fields of medical research, information technology, and STEM disciplines. It will seed wonderful new cross-disciplinary collaborations, underpin the work of our best and brightest young researchers and will allow our scientists to continue to make major discoveries that positively impact the Australian and global population more broadly.” “MAVERIC provides a huge leap forward in our compute capability that will revolutionize our researchers’ ability to address the most challenging and important research questions across the fields of medical research, information technology, and STEM disciplines.” —Professor James Whisstock, Deputy Dean Research of Monash’s Faculty of Medicine, Nursing, and Health Sciences Monash University frames MAVERIC not as a standalone asset, but as part of the national research infrastructure, intended to strengthen collaboration across academia, healthcare, government and industry. This approach positions Melbourne at the forefront of sovereign AI enabled research in the region. Data center scale as research infrastructure The infrastructure demands of modern AI research extend well beyond individual systems. Melbourne’s expanding data center footprint now supports hyperscale compute, applied AI deployment and large-scale research workloads simultaneously. Total data center investment, US$ billions.Source: Data Centres Global Report 2025 In February 2026, CDC Data Centres opened its first Melbourne campus in Brooklyn, with two live facilities and a third in planning. Combined with CDC’s Laverton campus, Melbourne is projected to host more than 800 megawatts of sovereign digital capacity, critical for AI workloads requiring sustained access to high-density power, cooling and secure environments. Parallel investment is underway in Fishermans Bend, where NEXTDC is developing a AUD $2 billion AI and digital infrastructure hub adjacent to the Innovation Precinct. Planned facilities include an AI Factory, a Mission Critical Operations Center and a Technology Center of Excellence, enabling sovereign AI, high-performance computing and cross-sector collaboration across health, defence and finance. Melbourne hosts Australia’s largest cluster of AI firms, with 188 companies, and more than 40 data centers currently operate across Victoria. The Victorian Government has complemented this growth with an initial AUD $5.5 million investment in the Sustainable Data Center Action Plan. Together, these developments reinforce Melbourne’s role as a national and increasingly global hub for high-performance AI infrastructure as model complexity and infrastructure dependency continue to accelerate. Applied AI research at scale Monash University is home to MAVERIC, Australia’s largest university-based AI supercomputer, built and deployed by Monash in partnership with NVIDIA, Dell Technologies, and CDC Data Centres.Monash University Melbourne’s research strength is underpinned by a dense university network with deep capability across AI, data science and engineering. Institutions including Monash University, the University of Melbourne, Deakin University, La Trobe University, RMIT University and Swinburne University of Technology collectively support research across machine learning, robotics, human-computer interaction, extended reality and advanced manufacturing. This concentration fosters applied collaboration where AI intersects with medicine, sustainability, cognitive systems and immersive technologies. For visiting researchers, it provides access not only to academic expertise but also to live infrastructure environments where research can be tested and validated, reinforcing Melbourne’s position as one of the Asia-Pacific’s most integrated AI research ecosystems. Conferences as research accelerators Plenary session at Melbourne Convention and Exhibition Center.Melbourne Convention Bureau Melbourne’s selection as host city for a growing number of international technology conferences reflects the convergence of research capability and infrastructure maturity. In September 2026, Data Center World Australia and The AI Summit Australia will be co-located at the Melbourne Convention and Exhibition Center, bringing together global leaders across AI, digital infrastructure and enterprise technology. The pairing highlights a broader reality: advances in AI are inseparable from the infrastructure that enables them. Melbourne’s expanding data center footprint now supports hyperscale compute, applied AI deployment and large-scale research workloads simultaneously. Research-led conferences are also expanding Melbourne’s global footprint. ICONIP 2026, hosted by Deakin University, will bring up to 700 researchers in neural networks and machine learning, followed in 2027 by IEEE VR, the leading conference on virtual reality and 3D user interfaces, attracting up to 1,000 delegates. In this context, conferences function not simply as events, but as infrastructure for knowledge transfer, supporting standards exchange, collaboration and system-level learning at global scale. A global platform for advancing research Sovereign compute, data center scale and a strong conference pipeline create a reinforcing cycle, enabling researchers to engage directly with infrastructure and industry well beyond the event itself. By closing the gap between theory and deployment, Melbourne supports deeper technical exchange and more enduring global research networks. This role was recognized in 2025 when the IEEE awarded Melbourne Convention Bureau the 2025 Organisational Supporting Friend of IEEE Member and Geographic Activities (MGA) — the first convention bureau in the Asia Pacific region to receive the acknowledgement as a result of the longstanding partnership with the IEEE Victorian Section. Melbourne Convention Bureau (MCB) representative Fatima Aboudrar, Senior Business Development Manager, with Vijay S. Paul, Immediate Past Chair, IEEE Victorian Section, receiving Supporting Friend Member recognition in 2025. As AI research becomes increasingly dependent on infrastructure scale, sovereign capability, and global collaboration, Melbourne is moving beyond hosting conversations to actively enabling the systems that advance AI and data‑driven research at global scale. Conference support in Melbourne Your browser does not support the video tag. Why host a conference in Melbourne, Australia.Melbourne Convention Bureau This ecosystem is underpinned by Melbourne’s highly accessible city center, where world-class venues, research institutions and industry hubs are located in close proximity. Free public transport and a compact city footprint enable seamless movement from conference floor to real-world application. Melbourne Convention Bureau (MCB) is a not-for-profit state government agency with over 60 years’ experience, that provides IEEE and its members with free support to bring international conferences to Melbourne, Australia. MCB’s support spans early-stage exploration and international bidding through to securing government funding, connecting organizers with venues, accommodation and event suppliers, and providing destination support for conference planning and delivery. Organizations considering a conference in Australia are encouraged to connect with MCB’s dedicated team, which supports IEEE conferences in Melbourne. Enquiries can be directed to info@melbournecb.com.au.
When Ana Inês Inácio goes to work at the Netherlands Organization for Applied Scientific Research (TNO) in The Hague, she thinks about signals most people never notice: radio waves moving between satellites, sensors, and future wireless networks. The integrated circuits the research scientist designs lay the foundation for next-generation RF sensor systems critical to advancing radar technologies. Ana Inês Inácio EMPLOYER Netherlands Organization for Applied Scientific Research, TNO TITLE Scientist IEEE MEMBER GRADE Senior member ALMA MATER University of Aveiro, in Portugal Those invisible RF signals are only part of what earned the IEEE senior member her global recognition. Inácio recently received the IEEE–Eta Kappa Nu Outstanding Young Professional Award for “leadership in IEEE Young Professionals, fostering innovation and inclusivity, and pioneering advancements in RF sensor systems, bridging technical excellence with impactful community engagement.” The recognition from IEEE’s honor society reflects a career built along two parallel paths: advancing RF circuit design while helping engineers worldwide build professional communities. “I’ve always liked building things,” Inácio says. “Sometimes that means circuits; sometimes it means helping people connect and grow together.” That blend of technical innovation and global leadership gives her work impact far beyond the laboratory. EE lessons at the kitchen table Inácio grew up in Vales do Rio, a rural village near Covilhã in central Portugal. The region was known for farming and textiles, she says. Many residents worked in the textile industry, including her grandfather, who repaired machinery such as industrial looms. He became her first engineering teacher without ever holding the formal title. Through correspondence courses delivered by mail, he taught himself electrical systems. At home, he explained electricity to his granddaughter while he repaired the household’s appliances and wiring. “He would show me why something broke and how we could fix it,” she recalls. It sparked her curiosity. Her mother was a tailor who later managed other tailors. Her father left his factory job to attend culinary school and now cooks at an elder-care facility. Curiosity was a trait that ran through the family. By high school, Inácio was drawn equally to mathematics and physics and to biology and geology, she says. Encouragement from teachers and an uncle, an engineer, ultimately steered her toward electronics engineering. Conducting research on integrated circuits In 2008 she enrolled in an integrated master’s degree program in electrical and telecommunications engineering at the Universidade de Aveiro in Portugal, a five-year degree that combined undergraduate and graduate studies. An opportunity to study abroad changed her path. In 2012 she moved to the Netherlands to study at Eindhoven University of Technology (TU/e) through a six-month European exchange program with UAveiro. A professor encouraged her to stay on, so she completed her final year of masters in the Netherlands. She focused on techniques to improve the linearization of RF power amplifiers at Thales. The company, based in Hengelo, Netherlands, designs and produces electronics for defense and security. She earned her master’s degree from UAveiro in 2013. After graduating, she joined the integrated circuit design group at the University of Twente, in The Netherlands, conducting collaborative research as part of a nationally funded program on linearization techniques for RF front-end systems. The experience introduced her to international research culture and persuaded her to pursue a career abroad, she says. Engineering the future of wireless Inácio joined TNO in 2018 as a junior scientist and innovator: her first professional industry job. Today she designs integrated RF front-end systems—the circuits that allow devices to transmit and receive wireless signals. The components sit at the core of modern communications, enabling sensor networks, satellite links, and emerging 6G technologies. Her work aims to tackle a central challenge: getting greater performance from smaller chips. “As communication evolves, we need more bandwidth to transfer more data at higher speeds,” she says. “The question is how much complexity you can integrate into one system while keeping it efficient.” Unlike commercial lab environments, which reuse established designs, research projects often start from scratch. Each transmit-receive chain—the signal path that converts digital data to radio waves and back again—is tailored to specific requirements. Her work focuses on improving key circuit characteristics including linearity (ensuring that the signals that go out of the antenna are not distorted) as well as noise reduction (so design blocks can be optimized). Advanced design techniques help devices communicate more reliably while consuming less energy, a critical need for large sensor networks such as the Internet of Things, she says. Artificial intelligence is beginning to influence her field, she says: “AI is already helping us work faster. The real challenge is learning how to use it to make better designs, not just quicker ones.” A parallel vocation with IEEE While her technical career flourished in research labs, an additional journey unfolded through IEEE. Inácio joined the organization in 2009 as a student after discovering UAveiro’s student branch. What began as curiosity evolved into a long-term leadership path. She advanced through roles within Region 8—covering Europe, Africa, and the Middle East—one of the organization’s most culturally diverse regions. She was the student branch’s vice chair, and the region’s student representative for more than 22,000 IEEE members. She also served as the Young Professionals Affinity Group chair for the IEEE Benelux Section, which encompasses Belgium, the Netherlands, and Luxembourg. Currently, she serves as the immediate past chair of the Region 8 Young Professionals Committee, and vice chair and IEEE Member and Geographical Activities representative on the IEEE Young Professionals Committee. In those roles, she represents close to 135,000 IEEE members. In addition, she is an active member of the IEEE Microwave Theory and Technology Society, currently serving as its Young Professionals liaison. Her involvement with IEEE has boosted her professional confidence, she says. “IEEE didn’t directly give me promotions at my day job, but it gave me leadership skills, networking opportunities, and the ability to work with people from everywhere,” she says. Those experiences now shape her collaborations at TNO, where international teamwork is essential. The IEEE-HKN Outstanding Young Professional Award recognizes that combination of technical excellence and community impact, she says. Looking back, Inácio sees a clear thread connecting her childhood curiosity, her international career, and her IEEE leadership: Engineering, she says, is ultimately about people as much as it is about technology.
Cybersecurity consultants have never been more in demand. Information security analyst roles are projected to grow nearly 30 percent between now and 2034, according to the U.S. Bureau of Labor Statistics. More than 15 million cybercrime incidents occurred worldwide in 2024, Statista reported. Data breaches are costly and pose direct safety risks. Statista reported that more than US $10 trillion is spent annually repairing the damage caused by cybercrime, most commonly phishing, spoofing, extortion, and data breaches. In one example in the United States, breathalyzer devices installed in vehicles became disabled, leaving hundreds of drivers stranded, as detailed in an IEEE Spectrum article. To help you acquire the skills you need to distinguish yourself from other cybersecurity job candidates, the IEEE Computer Society offers a “What Makes a Great Cybersecurity Consultant” guide. The 23-page PDF includes hard and soft skills you need, a list of certifications to pursue, and key IEEE cybersecurity conferences for staying updated on developments in the field. The guide includes advice from two cybersecurity experts. John D. Johnson, an IEEE senior member, is the founder and CEO of Aligned Security in Bettendorf, Iowa. Ricardo J. Rodriguez is an associate professor of computer science and systems engineering at the Universidad de Zaragoza, in Spain, who researches digital forensics and other cybersecurity topics. “Technology, remote work, and a shortage of skilled workers make this the ideal time to consider becoming a cybersecurity consultant,” Johnson says in the guide. “Consulting can give you the flexibility, variety, and control over where you want your career to go.” Hard and soft skills At a minimum, cybersecurity professionals should have a general understanding of IT including operating systems, communication protocols, network architecture, and programming languages such as C++, Java, and Python. They also should be well-versed in security auditing, firewall management, penetration testing, and encryption technologies. The principles of ethical hacking and coding would be handy as well. “To be able to defend a system well, you first have to know how to attack it,” Rodriguez says. The guide explains that there are now more technologies available to help cybersecurity consultants monitor threats and protect systems. They include security orchestration, automation, and response (SOAR) platforms, which automate workflows to collect security data, streamline incident response, and automate repetitive tasks. Rodriguez points to advances in domain name system security extensions (DNSSEC), which uses digital signatures based on public-key cryptography to strengthen the authentication of the domain name system. By validating data authenticity, DNSSEC safeguards against attacks such as DNS spoofing and guarantees that users connect to the correct IP address. Technologies such as artificial intelligence, blockchain, and quantum computing will increasingly be used to help thwart cyberattacks, the guide suggests. AI is expected to enhance the quality of data analysis, Rodriguez says. Although hard skills are important, soft skills are just as crucial, according to the guide. Critical thinking, project management, flexibility, teamwork, and organizational and presentation skills are essential. It’s not enough to be good at analyzing security vulnerabilities; you also need to clearly describe the situation and explain possible solutions. “Soft skills are important to achieve good team cohesion,” Rodriguez says, “because consultants often lead diverse teams from within their client’s organization.” “It’s essential,” Johnson adds, “that you demonstrate to clients you’re a team player and a capable communicator, and that you meet your commitments.” Security certifications Possessing security-specific credentials is a valuable way to demonstrate your expertise to potential clients, according to the guide. Because hundreds of certifications are available, Johnson says, pinpointing the most relevant ones can be challenging. Some people focus on theoretical knowledge, while others want to cover practical applications of technology. “Survey the industry and compare it to your skills,” Johnson recommends. “Decide what you want to do, and identify where you have gaps in your skills and experience.” Here are four of the nine certifications listed in the guide that are frequently cited as being important. All the providers are cybersecurity organizations. Certified information security manager. This globally recognized certification from the ISACA is for professionals managing enterprise information security. Certified cloud security professional. Offered by ISC2, this credential validates advanced technical skills in designing, managing, and securing cloud infrastructure. Certified ethical hacker. This certification from the International Council of E-Commerce Consultants (C-Council) confirms proficiency in using methods commonly employed by malicious hackers to detect vulnerabilities. Offensive security certified professional. A hands-on, 24-hour certification exam offered by OffSec covers practical testing skills. Additional industry-specific certifications might be required for organizations in finance, government, health care, or manufacturing. Sound general knowledge—backed by experience, training, and certification—is an essential foundation for being a specialist, Johnson says. Conferences and networking opportunities Events sponsored by the IEEE Computer Society can help you learn about the latest research and advancements in cybersecurity: IEEE Symposium on Security and Privacy, from 18 to 21 May in San Francisco. IEEE European Symposium on Security and Privacy, from 6 to 10 July in Lisbon. IEEE International Conference on Cyber Security and Resilience, from 3 to 5 August in Lisbon. IEEE Secure Development Conference, from 14 to 16 October in Indianapolis. Conferences can give you insight into the field and let you do some networking, but it’s important to network elsewhere as well, experts say. Consider joining the IEEE Technical Community on Security and Privacy, which connects experts and professionals advancing research in areas such as encryption, operating system security, and data privacy. Learning and meeting people keeps your knowledge sharp and can lead to mentorship opportunities with established cybersecurity consultants, Johnson says. Other IEEE resources The IEEE Computer Society’s cybersecurity resources page offers a wealth of information including fundamentals, possible career paths, and standards development. To keep you updated on trends, the society publishes IEEE Transactions on Privacy and the IEEE Security and Privacy magazine. In addition to the guide, the IEEE Learning Network offers nearly 30 courses on cybersecurity. And you can find research papers in the IEEE Xplore Digital Library.
This article is brought to you by DAIMON Robotics. This April, Hong Kong-based DAIMON Robotics has released Daimon-Infinity, which it describes as the largest omni-modal robotic dataset for physical AI, featuring high resolution tactile sensing and spanning a wide range of tasks from folding laundry at home to manufacturing on factory assembly lines. The project is supported by collaborative efforts of partners across China and the globe, including Google DeepMind, Northwestern University, and the National University of Singapore. The move signals a key strategic initiative for DAIMON, a two-and-a-half-year-old company known for its advanced tactile sensor hardware, most notably a monochromatic, vision-based tactile sensor that packs over 110,000 effective sensing units into a fingertip-sized module. Drawing on its high-resolution tactile sensing technology and a distributed out-of-lab collection network capable of generating millions of hours of data annually, DAIMON is building large-scale robot manipulation datasets that include vast amounts of tactile sensing data. To accelerate the real-world deployment of embodied AI, the company has also open-sourced 10,000 hours of its data. Prof. Michael Yu Wang, co-founder and chief scientist at DAIMON Robotics, has pioneered Vision-Tactile-Language-Action (VTLA) architecture, elevating the tactile to a modality on par with vision.DAIMON Robotics Behind the strategy is Prof. Michael Yu Wang, DAIMON’s co-founder and chief scientist. Prof. Wang earned his PhD at Carnegie Mellon — studying manipulation under Matt Mason — and went on to found the Robotics Institute at the Hong Kong University of Science and Technology. An IEEE Fellow and former Editor-in-Chief of IEEE Transactions on Automation Science and Engineering, he has spent roughly four decades in the field. His objective is to address the missing “insensitivity” of robot manipulation, which practically relies on the dominant Vision-Language-Action (VLA) model. He and his team have pioneered Vision-Tactile-Language-Action (VTLA) architecture, elevating the tactile to a modality on par with vision. We spoke with Prof. Wang about how tactile feedback aims to change dexterous manipulation, how the dataset initiative is foreseen to improve our understanding of robotic hands in natural environments, and where — from hotels to convenience stores in China — he sees touch-enabled robots making their first real-world inroads. Daimon-Infinity is the world’s largest omni-modal dataset for Physical AI, featuring million-hour scale multimodal data, ultra-high-res tactile feedback, data from 80+ real scenarios and 2,000+ human skills, and more.DAIMON Robotics The Dataset Initiative This month, DAIMON Robotics released the largest and most comprehensive robotic manipulation dataset with multiple leading academic institutions and enterprises. Why releasing the dataset now, rather than continuing to focus on product development? What impact will this have on the embodied intelligence industry? DAIMON Robotics has been around for almost two and a half years. We have been committed to developing high-resolution, multimodal tactile sensing devices to perceive the interaction between a robot’s hand (particularly its fingertips) and objects. Our devices have become quite robust. They are now accepted and used by a large segment of users, including academic and research institutes as well as leading humanoid robotics companies. As embodied AI continues to advance, the critical role of data has been clearer. Data scarcity remains a primary bottleneck in robot learning, particularly the lack of physical interaction data, which is essential for robots to operate effectively in the real world. Consequently, data quality, reliability, and cost have become major concerns in both research and commercial development. This is exactly where DAIMON excels. Our vision-based tactile technology captures high-quality, multimodal tactile data. Beyond basic contact forces, it records deformation, slip and friction, material properties and surface textures — enabling a comprehensive reconstruction of physical interactions. Building on our expertise in multimodal fusion, we have developed a robust data processing pipeline that seamlessly integrates tactile feedback with vision, motion trajectories, and natural language, transforming raw inputs into training-ready dataset for machine learning models. Recognizing the industry-wide data gap, we view large-scale data collection not only as our unique competitive advantage, but as a responsibility to the broader community. By building and open-sourcing the dataset, we aim to provide the high-quality “fuel” needed to power embodied AI, ultimately accelerating the real-world deployment of general-purpose robotic foundation models. The robotics industry is highly competitive, and many teams have chosen to focus on data. DAIMON is releasing a large and highly comprehensive cross-embodiment, vision-based tactile multimodal robotic manipulation dataset. How were you able to achieve this? We have a dedicated in-house team focused on expanding our capabilities, including building hardware devices and developing our own large-scale model. Although we are a relatively small company, our core tactile sensing technology and innovative data collection paradigm enable us to build large-scale dataset. Our approach is to broaden our offering. We have built the world’s largest distributed out-of-lab data collection network. Rather than relying on centralized data factories, this lightweight and scalable system allows data to be gathered across diverse real-world environments, enabling us to generate millions of hours of data per year. “To drive the advancement of the entire embodied AI field, we have open-sourced 10,000 hours of the dataset for the broader community.” —Prof. Michael Yu Wang, DAIMON Robotics This dataset is being jointly developed with several institutions worldwide. What roles did they play in its development, and how will the dataset benefit their research and products? Besides China based teams, our partners include leading research groups from universities, such as Northwestern University and the National University of Singapore, as well as top global enterprises like Google DeepMind and China Mobile. Their decision to partner with DAIMON is a strong testament to the value of our tactile-rich dataset. Among the companies involved there are some that have already built their own models but are now incorporating tactile information. By deploying our data collection devices across research, manufacturing and other real-world scenarios, they help us to gather highly practical, application-driven data. In turn, our partners leverage the data to train models tailored to their specific use cases. Furthermore, to drive the advancement of the entire embodied AI field, we have open-sourced 10,000 hours of the dataset for the broader community. Equipped with Daimon’s visuotactile sensor, the gripper delicately senses contact and precisely controls force to pick up a fragile eggshell.Daimon Robotics From VLA to VTLA: Why Tactile Sensing Changes the Equation The mainstream paradigm in robotics is currently the Vision-Language-Action (VLA) model, but your team has proposed a Vision-Tactile-Language-Action (VTLA) model. Why is it necessary to incorporate tactile sensing? What does it enable robots to achieve, and which tasks are likely to fail without tactile feedback? Over these years of working to make generalist robots capable of performing manipulation tasks, especially dexterous manipulation — not just power grasping or holding an object, but manipulating objects and using tools to impart forces and motion onto parts — we see these robots being used in household as well as industrial assembly settings. It is well established that tactile information is essential for providing feedback about contact states so that robots can guide their hands and fingers to perform reliable manipulation. Without tactile sensing, robots are severely limited. They struggle to locate objects in dark environments, and without slip detection, they can easily drop fragile items like glass. Furthermore, the inability to precisely control force often leads to failed manipulation tasks or, in severe cases, physical damage. Naturally, the VLA approach needs to be enhanced to incorporate tactile information. We expanded the VLA framework to incorporate tactile data, creating the VTLA model. An additional benefit of our tactile sensor is that it is vision-based: We capture visual images of the deformation on the fingertip surface. We capture multiple images in a time sequence that encodes contact information, from which we can infer forces and other contact states. This aligns well with the visual framework that VLA is based upon. Having tactile information in a visual image format makes it naturally suitable for integration into the VLA framework, transforming it into a VTLA system. That is the key advantage: Vision-based tactile sensors provide very high resolution at the pixel level, and this data can be incorporated into the framework, whether it is an end-to-end model or another type of architecture. DAIMON has been known for its vision-based tactile sensors that can pack over 110,000 effective sensing units.DAIMON Robotics The Technology: Monochromatic Vision-based Tactile Sensing You and your team have spent many years deeply engaged in vision-based tactile sensing and have developed the world’s first monochromatic vision-based tactile sensing technology. Why did you choose this technical path? Once we started investigating tactile sensors, we understood our needs. We wanted sensors that closely mimic what we have under our fingertip skin. Physiological studies have well documented the capabilities humans have at their fingertips — knowing what we touch, what kind of material it is, how forces are distributed, and whether it is moving into the right position as our brain controls our hands. We knew that replicating these capabilities on a robot hand’s fingertips would help considerably. When we surveyed existing technologies, we found many types, including vision-based tactile sensors with tri-color optics and other simpler designs. We decided to integrate the best of these into an engineering-robust solution that works well without being overly complicated, keeping cost, reliability, and sensitivity within a satisfactory range, thus ultimately developing a monochromatic vision-based tactile sensing technique. This is fundamentally an engineering approach rather than a purely scientific one, since a great deal of foundational research already existed. With the growing realization of the necessity of tactile data, all of this will advance hand in hand. DAIMON vision-based tactile sensor captures high-quality, multimodal tactile data.DAIMON Robotics Last year, DAIMON launched a multi-dimensional, high-resolution, high-frequency vision-based tactile sensor. Compared with traditional tactile sensors, where does its core advantage lie? Which industries could it potentially transform? The key features of our sensors are the density of distributed force measurement and the deformation we can capture over the area of a fingertip. I believe we have the highest density in terms of sensing units. That is one very important metric. The other is dynamics: the frequency and bandwidth — how quickly we can detect force changes, transmit signals, and process them in real time. Other important aspects are largely engineering-related, such as reliability, drift, durability of the soft surface, and resistance to interference from magnetic, optical, or environmental factors. A growing number of researchers and companies are recognizing the importance of tactile sensing and adopting our technology. I believe the advances in tactile sensing will elevate the entire community and industry to a higher level. One of our potential customers is deploying humanoid robots in a small convenience store, with densely packed shelves where shelf space is at a premium. The robot needs to reach into very tight spaces — tighter than books on a shelf — to pick out an object. Current two-jaw parallel grippers cannot fit into most of these spaces. Observing how humans pick up objects, you clearly need at least three slim fingers to touch and roll the object toward you and secure it. Thus, we are starting to see very specific needs where tactile sensing capabilities are essential. From Academia to Startup After 40 years in academia — founding the HKUST Robotics Institute, earning prestigious honors including IEEE Fellow, and serving as Editor-in-Chief of IEEE TASE — what motivated you to found DAIMON Robotics? I have come a long way. I started learning robotics during my PhD at Carnegie Mellon, where there were truly remarkable groups working on locomotion under Marc Raibert, who founded Boston Dynamics, and on manipulation under my advisor, Matt Mason, a leader in the field. We have been working on dexterous manipulation, not only at Carnegie Mellon, but globally for many years. However, progress has been limited for a long time, especially in building dexterous hands and making them work. Only recently have locomotion robots truly taken off, and only in the last few years have we begun to see major advancements in robot hands. There is clearly room for advancing manipulation capabilities, which would enable robots to do work like humans. While at Hong Kong University of Science and Technology, I saw increasingly greater people entering this area in the form of students and postdoctoral researchers. We wanted to jumpstart our effort by leveraging the available capital and talent resources. Fortunately, one of my postdocs, Dr. Duan Jianghua, has a strong sense for commercial opportunities. Recognizing the rapid growth of robotics market and the unique value that our vision-based tactile sensing technology could bring, together we started DAIMON Robotics, and it has progressed well. The community has grown tremendously in China, Japan, Korea, the U.S., and Europe. Robots equipped with DAIMON technology have been deployed in factory settings. The company aims to enable robots to achieve “embodied intelligence” and close the gap between what they can see and what they can feel.DAIMON Robotics Business Model and Commercial Strategy What is DAIMON’s current business model and strategic focus? What role does the dataset release play in your commercial strategy? We started as a device company focused on making highly capable tactile sensors, especially for robot hands. But as technology and business developed, everyone realized it is not just about one component, rather the entire technology chain: devices, data of adequate quality and quantity, and finally the right framework to build, train, and deploy models on robots in real application environments. Our business strategy is best described as “3D”: Devices, Data, and Deployment. We build devices for data collection, our own ecosystem, and for deploying them in our partners’ potential application domains. This enables the collection of real-world tactile-rich data and complete closed-loop validation. This will become an integral part of the 3D business model. Most startups in this space are following a similar path until eventually some may become more specialized or more tightly integrated with other companies. For now, it is mostly vertical integration. Embodied Skills and the Convergence Moment You’ve introduced the concept of “embodied skills” as essential for humanoid robots to move beyond having just an advanced AI “brain.” What prompted this insight? What new capabilities could embodied skills enable? After the rapid evolution of models and hardware over the past two years, has your definition or roadmap for embodied skills evolved? We have come a long way now see a convergence point where electrical, electronic, and mechatronic hardware technologies have advanced tremendously in last two decades. Robots are now fully electric, do not require hydraulics, because hardware has evolved rapidly. Modern electronics provide tremendous bandwidth with high torques. If we can build intelligence into these systems, we can create truly humanoid robots with the ability to operate in unstructured environments, make decisions, and take actions autonomously. “Our vision is for robots to achieve robust manipulation capabilities and evolve into reliable partners for humans.” —Prof. Michael Yu Wang, DAIMON Robotics AI has arrived at exactly the right time. Enormous resources have been invested in AI development, especially large language models, which are now being generalized into world models that enable physical AI capabilities. We would like to see these manifested in real-world systems. While both AI and core hardware technologies continue to evolve, the focus is much clearer now. For example, human-sized robots are preferred in a home environment. This is an exciting domain with a promise of great societal benefit if we can eventually achieve safe, reliable, and cost-effective robots. The Road to Real-World Deployment Today, many robots can deliver impressive demos, yet there remains a gap before they truly enter real-world applications. What could be a potential trigger for real-world deployment? Which scenarios are most likely to achieve large-scale deployment first? I think the road toward large-scale deployment of generalist robots is still long, but we are starting to see signs of feasibility within specific domains. It is very similar to autonomous vehicles, where we are yet to see full deployment of robo-taxis, while we have already started to find mobile robots and smaller vehicles widely deployed in the hospitality industry. Virtually every major hotel in China now has a delivery robot — no arms, just a vehicle that picks up items from the hotel lobby (e.g., food deliveries). The delivery person just loads the food and selects the room number. It is up to the robot thereafter to navigate and reach the guest’s room, which includes using the elevator, to deliver the food. This is already nearly 100 percent deployed in major Chinese hotels. Hotel and restaurant robots are viewed as a model for deploying humanoid robots in specific domains like overnight drugstores and convenience stores. I expect complete deployment in such settings within a short timeframe, followed by other applications. Overall, we can expect autonomous robots, including humanoids, to progressively penetrate specific sectors, delivering value in each and expanding into others. Ultimately, our vision is for robots to achieve robust manipulation capabilities and evolve into reliable partners for humans. By seamlessly integrating into our homes and daily lives, they will genuinely benefit and serve humanity. This interview has been edited for length and clarity.
Many of the world’s most advanced electronic systems—including Internet routers, wireless base stations, medical imaging scanners, and some artificial intelligence tools—depend on field-programmable gate arrays. Computer chips with internal hardware circuits, the FPGAs can be reconfigured after manufacturing. On 12 March, an IEEE Milestone plaque recognizing the first FPGA was dedicated at the Advanced Micro Devices campus in San Jose, Calif., the former Xilinx headquarters and the birthplace of the technology. The FPGA earned the Milestone designation because it introduced iteration to semiconductor design. Engineers could redesign hardware repeatedly without fabricating a new chip, dramatically reducing development risk and enabling faster innovation at a time when semiconductor costs were rising rapidly. The ceremony, which was organized by the IEEE Santa Clara Valley Section, brought together professionals from across the semiconductor industry and IEEE leadership. Speakers at the event included Stephen Trimberger, an IEEE and ACM Fellow whose technical contributions helped shape modern FPGA architecture. Trimberger reflected on how the invention enabled software-programmable hardware. Solving computing’s flexibility-performance tradeoff FPGAs emerged in the 1980s to address a core limitation in computing. A microprocessor executes software instructions sequentially, making it flexible but sometimes too slow for workloads requiring many operations at once. At the other extreme, application-specific integrated circuits are chips designed to do only one task. ASICs achieve high efficiency but require lengthy development cycles and nonrecurring engineering costs, which are large, upfront investments. Expenses include designing the chip and preparing it for manufacturing—a process that involves creating detailed layouts, building masks for the fabrication machines, and setting up production lines to handle the tiny circuits. “ASICs can deliver the best performance, but the development cycle is long and the nonrecurring engineering cost can be very high,” says Jason Cong, an IEEE Fellow and professor of computer science at the University of California, Los Angeles. “FPGAs provide a sweet spot between processors and custom silicon.” Cong’s foundational work in FPGA design automation and high-level synthesis transformed how reconfigurable systems are programmed. He developed synthesis tools that translate C/C++ into hardware designs, for example. At the heart of his work is an underlying principle first espoused by electrical engineer Ross Freeman: By configuring hardware using programmable memory embedded inside the chip, FPGAs combine hardware-level speed with the adaptability traditionally associated with software. Silicon Valley origins: the first FPGA The FPGA architecture originated in the mid-1980s at Xilinx, a Silicon Valley company founded in 1984. The invention is widely credited to Freeman, a Xilinx cofounder and the startup’s CTO. He envisioned a chip with circuitry that could be configured after fabrication rather than fixed permanently during creation. Articles about the history of the FPGA emphasize that he saw it as a deliberate break from conventional chip design. At the time, semiconductor engineers treated transistors as scarce resources. Custom chips were carefully optimized so that nearly every transistor served a specific purpose. Freeman proposed a different approach. He figured Moore’s Law would soon change chip economics. The principle holds that transistor counts roughly double every two years, making computing cheaper and more powerful. Freeman posited that as transistors became abundant, flexibility would matter more than perfect efficiency. He envisioned a device composed of programmable logic blocks connected through configurable routing—a chip filled with what he described as “open gates,” ready to be defined by users after manufacturing. Instead of fixing hardware in silicon permanently, engineers could configure and reconfigure circuits as requirements evolved. Freeman sometimes compared the concept to a blank cassette tape: Manufacturers would supply the medium, while engineers determined its function. The analogy captured a profound shift in who controls the technology, shifting hardware design flexibility from chip fabrication facilities to the system designers themselves. In 1985 Xilinx introduced the first FPGA for commercial sale: the XC2064. The device contained 64 configurable logic blocks—small digital circuits capable of performing logical operations—arranged in an 8-by-8 grid. Programmable routing channels allowed engineers to define how signals moved between blocks, effectively wiring a custom circuit with software. Fabricated using a 2-micrometer process (meaning that 2 µm was the minimum size of the features that could be patterned onto silicon using photolithography), the XC2064 implemented a few thousand logic gates. Modern FPGAs can contain hundreds of millions of gates, enabling vastly more complex designs. Yet the XC2064 established a design workflow still used today: Engineers describe the hardware behavior digitally and then “compile the design,” a process that automatically translates the plans into the instructions the FPGA needs to set its logic blocks and wiring, according to AMD. Engineers then load that configuration onto the chip. The breakthrough: hardware defined by memory Earlier programmable logic devices, such as erasable programmable read-only memory, or EPROM, allowed limited customization but relied on largely fixed wiring structures that did not scale well as circuits grew more complex, Cong says. FPGAs introduced programmable interconnects—networks of electronic switches controlled by memory cells distributed across the chip. When powered on, the device loads a bitstream configuration file that determines how its internal circuits behave. “As process technology improved and transistor counts increased, the cost of programmability became much less significant,” Cong says. From “glue logic” to essential infrastructure “Initially, FPGAs were used as what engineers called glue logic,” Cong says. Glue logic refers to simple circuits that connect processors, memory, and peripheral devices so the system works reliably, according to PC Magazine. In other words, it “glues” different components together, especially when interfaces change frequently. Early adopters recognized the advantage of hardware that could adapt as standards evolved. In “The History, Status, and Future of FPGAs,” published in Communications of the ACM, engineers at Xilinx and organizations such as Bell Labs, Fairchild Semiconductor, IBM, and Sun Microsystems said the earliest uses of FPGAs were for prototyping ASICs. They also used it for validating complex systems by running their software before fabrication, allowing the companies to deploy specialized products manufactured in modest volumes. Those uses revealed a broader shift: Hardware no longer needed to remain fixed once deployed. Attendees at the Milestone plaque dedication ceremony included (seated L to R) 2025 IEEE President Kathleen Kramer, 2024 IEEE President Tom Coughlin, and Santa Clara Valley Section Milestones Chair Brian Berg.Douglas Peck/AMD Semiconductor economics changed the equation The rise of FPGAs closely followed changes in semiconductor economics, Cong says. Developing a custom chip requires a large upfront investment before production begins. As fabrication costs increased, products had to ship in large quantities to make ASIC development economically viable, according to a post published by AnySilicon. FPGAs allowed designers to move forward without that larger monetary commitment. ASIC development typically requires 18 to 24 months from conception to silicon, while FPGA implementations often can be completed within three to six months using modern design tools, Cong says. The shorter cycle and the ability to reconfigure the hardware enabled startups, universities, and equipment manufacturers to experiment with advanced architectures that were previously accessible mainly to large chip companies. Lookup tables and the rise of reconfigurable computing A popular technique for implementing mathematical functions in hardware is the lookup table (LUT). A LUT is a small memory element that stores the results of logical operations, according to “LUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs,” a paper selected for presentation next month at the 34th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). Instead of repeatedly recalculating outcomes, the chip retrieves answers directly from memory. Cong compares the approach to consulting multiplication tables rather than recomputing the arithmetic each time. Research led by Cong and others helped develop efficient methods for mapping digital circuits onto LUT-based architectures, shaping routing and layout strategies used in modern devices. As transistor budgets expanded, FPGA vendors integrated memory blocks, digital signal-processing units, high-speed communication interfaces, cryptographic engines, and embedded processors, transforming the devices into versatile computing platforms. Why the gate arrays are distinct from CPUs, GPUs, and ASICs FPGAs coexist with other processors because each one optimizes different priorities. Central processing units excel at general computing. Graphics processing units, designed to perform many calculations simultaneously, dominate large parallel workloads such as AI training. ASICs provide maximum efficiency when designs remain stable and production volumes are high. “ASICs can deliver the best performance, but the development cycle is long, and the nonrecurring engineering cost can be very high. FPGAs provide a sweet spot between processors and custom silicon.” —Jason Cong, IEEE Fellow and professor of computer science at UCLA. “FPGAs are not replacements for CPUs or GPUs,” Cong says. “They complement those processors in heterogeneous computing systems.” Modern computing platforms increasingly combine multiple types of processors to balance flexibility, performance, and energy efficiency. A Milestone for an idea, not just a device This IEEE Milestone recognizes more than a successful semiconductor product. It also acknowledges a shift in how engineers innovate. Reconfigurable hardware allows designers to test ideas quickly, refine architectures, and deploy systems while standards and markets evolve. “Without FPGAs,” Cong says, “the pace of hardware innovation would likely be much slower.” Four decades after the first FPGA appeared, the technology’s enduring legacy reflects Freeman’s insight: Hardware did not need to remain fixed. By accepting a small amount of unused silicon in exchange for adaptability, engineers transformed chips from static products into platforms for continuous experimentation—turning silicon itself into a medium engineers could rewrite. Among those who attended the Milestone ceremony were 2025 IEEE President Kathleen Kramer; 2024 IEEE President Tom Coughlin; Avery Lu, chair of the IEEE Santa Clara Valley Section; and Brian Berg, history and milestones chair of IEEE Region 6. They joined AMD’s chief executive, Lisa Su, and Salil Raje, senior vice president and general manager of adaptive and embedded computing at AMD. The IEEE Milestone plaque honoring the field-programmable gate array reads: “The FPGA is an integrated circuit with user-programmable Boolean logic functions and interconnects. FPGA inventor Ross Freeman cofounded Xilinx to productize his 1984 invention, and in 1985 the XC2064 was introduced with 64 programmable 4-input logic functions. Xilinx’s FPGAs helped accelerate a dramatic industry shift wherein ‘fabless’ companies could use software tools to design hardware while engaging ‘foundry’ companies to handle the capital-intensive task of manufacturing the software-defined hardware.” Administered by the IEEE History Center and supported by donors, the IEEE Milestone program recognizes outstanding technical developments worldwide that are at least 25 years old. Check out Spectrum’s History of Technology channel to read more stories about key engineering achievements.
The end of Moore’s Law is looming. Engineers and designers can do only so much to miniaturize transistors and pack as many of them as possible into chips. So they’re turning to other approaches to chip design, incorporating technologies like AI into the process. Samsung, for instance, is adding AI to its memory chips to enable processing in memory, thereby saving energy and speeding up machine learning. Speaking of speed, Google’s TPU V4 AI chip has doubled its processing power compared with that of its previous version. But AI holds still more promise and potential for the semiconductor industry. To better understand how AI is set to revolutionize chip design, we spoke with Heather Gorr, senior product manager for MathWorks’ MATLAB platform. How is AI currently being used to design the next generation of chips? Heather Gorr: AI is such an important technology because it’s involved in most parts of the cycle, including the design and manufacturing process. There’s a lot of important applications here, even in the general process engineering where we want to optimize things. I think defect detection is a big one at all phases of the process, especially in manufacturing. But even thinking ahead in the design process, [AI now plays a significant role] when you’re designing the light and the sensors and all the different components. There’s a lot of anomaly detection and fault mitigation that you really want to consider. Heather GorrMathWorks Then, thinking about the logistical modeling that you see in any industry, there is always planned downtime that you want to mitigate; but you also end up having unplanned downtime. So, looking back at that historical data of when you’ve had those moments where maybe it took a bit longer than expected to manufacture something, you can take a look at all of that data and use AI to try to identify the proximate cause or to see something that might jump out even in the processing and design phases. We think of AI oftentimes as a predictive tool, or as a robot doing something, but a lot of times you get a lot of insight from the data through AI. What are the benefits of using AI for chip design? Gorr: Historically, we’ve seen a lot of physics-based modeling, which is a very intensive process. We want to do a reduced order model, where instead of solving such a computationally expensive and extensive model, we can do something a little cheaper. You could create a surrogate model, so to speak, of that physics-based model, use the data, and then do your parameter sweeps, your optimizations, your Monte Carlo simulations using the surrogate model. That takes a lot less time computationally than solving the physics-based equations directly. So, we’re seeing that benefit in many ways, including the efficiency and economy that are the results of iterating quickly on the experiments and the simulations that will really help in the design. So it’s like having a digital twin in a sense? Gorr: Exactly. That’s pretty much what people are doing, where you have the physical system model and the experimental data. Then, in conjunction, you have this other model that you could tweak and tune and try different parameters and experiments that let sweep through all of those different situations and come up with a better design in the end. So, it’s going to be more efficient and, as you said, cheaper? Gorr: Yeah, definitely. Especially in the experimentation and design phases, where you’re trying different things. That’s obviously going to yield dramatic cost savings if you’re actually manufacturing and producing [the chips]. You want to simulate, test, experiment as much as possible without making something using the actual process engineering. We’ve talked about the benefits. How about the drawbacks? Gorr: The [AI-based experimental models] tend to not be as accurate as physics-based models. Of course, that’s why you do many simulations and parameter sweeps. But that’s also the benefit of having that digital twin, where you can keep that in mind—it’s not going to be as accurate as that precise model that we’ve developed over the years. Both chip design and manufacturing are system intensive; you have to consider every little part. And that can be really challenging. It’s a case where you might have models to predict something and different parts of it, but you still need to bring it all together. One of the other things to think about too is that you need the data to build the models. You have to incorporate data from all sorts of different sensors and different sorts of teams, and so that heightens the challenge. How can engineers use AI to better prepare and extract insights from hardware or sensor data? Gorr: We always think about using AI to predict something or do some robot task, but you can use AI to come up with patterns and pick out things you might not have noticed before on your own. People will use AI when they have high-frequency data coming from many different sensors, and a lot of times it’s useful to explore the frequency domain and things like data synchronization or resampling. Those can be really challenging if you’re not sure where to start. One of the things I would say is, use the tools that are available. There’s a vast community of people working on these things, and you can find lots of examples [of applications and techniques] on GitHub or MATLAB Central, where people have shared nice examples, even little apps they’ve created. I think many of us are buried in data and just not sure what to do with it, so definitely take advantage of what’s already out there in the community. You can explore and see what makes sense to you, and bring in that balance of domain knowledge and the insight you get from the tools and AI. What should engineers and designers consider when using AI for chip design? Gorr: Think through what problems you’re trying to solve or what insights you might hope to find, and try to be clear about that. Consider all of the different components, and document and test each of those different parts. Consider all of the people involved, and explain and hand off in a way that is sensible for the whole team. How do you think AI will affect chip designers’ jobs? Gorr: It’s going to free up a lot of human capital for more advanced tasks. We can use AI to reduce waste, to optimize the materials, to optimize the design, but then you still have that human involved whenever it comes to decision-making. I think it’s a great example of people and technology working hand in hand. It’s also an industry where all people involved—even on the manufacturing floor—need to have some level of understanding of what’s happening, so this is a great industry for advancing AI because of how we test things and how we think about them before we put them on the chip. How do you envision the future of AI and chip design? Gorr: It’s very much dependent on that human element—involving people in the process and having that interpretable model. We can do many things with the mathematical minutiae of modeling, but it comes down to how people are using it, how everybody in the process is understanding and applying it. Communication and involvement of people of all skill levels in the process are going to be really important. We’re going to see less of those superprecise predictions and more transparency of information, sharing, and that digital twin—not only using AI but also using our human knowledge and all of the work that many people have done over the years.