Ars Technica
์ค๋ ์ฑํฅ
IT/๊ธฐ์
RIP Anthony Head: Our 10 favorite moments of Buffy's Giles
Head's true geniusโand that of his character, Gilesโlay in quietly filling in the gaps in every scene
๐บ๐ธ ๋ฏธ๊ตญ ยท IT/๊ธฐ์ ยท "FILL" ยท ์ด 16๊ฑด
ํํฐ ๋ณด๊ธฐํ์ฌ ์ง์
50.0
0 = ๋ถ์ ์ฐ์ธ
50 = ์ค๋ฆฝ
100 = ๊ธ์ ์ฐ์ธ
์ต๊ทผ 7์ผ ๊ธฐ์ค 10,585๊ฑด์ ๋ถ์ํ ๊ฒฐ๊ณผ, ๋ด์ค ์ฌ๋ฆฌ์ง์๋ 50.0(๊ท ํ)์ ๋๋ค. ๊ธ์ 1๊ฑด(0.0%)ยท์ค๋ฆฝ 10,583๊ฑด(100.0%)ยท๋ถ์ 1๊ฑด(0.0%)์ด๋ฉฐ, ์ค๋ฆฝ ๋น์ค์ด ๋๋ ทํ๊ฒ ๋์ต๋๋ค. ์ฑํฅ ์ง์๋ ์ข ํฉ 18.8(์ค๋ ๊ท ํ)์ ๋๋ค.
Head's true geniusโand that of his character, Gilesโlay in quietly filling in the gaps in every scene
Facebook has long been filled with feeds of clickbait articles. Now, Meta is making its own clickbait articles with AI. The standalone Meta AI app now has a "For You" section that populates a list of clickbait-style stories for you to read. But the topics, images, and text are all AI-generated - and as questionable [โฆ]
Microsoft just kicked off Build 2026 with a keynote from CEO Satya Nadella and other company leaders. As expected, it was filled with announcements, ranging from new Surface hardware to an always-on personal assistant and updates across Microsoft's in-house AI models. If you didn't watch the event live, you can catch up on all the [โฆ]
It's early June, which means it's video game event season once again. Now that E3 has been gone for a few years, a bunch of showcases and presentations have started to fill the void, including big productions like Summer Game Fest Live and smaller affairs like Wholesome Games Direct. If you love following gaming news, [โฆ]
Electrons are great. We use them to move vehicles, illuminate cities, and, of course, compute. But computation is not confined to the world of electronics. And shifting to alternative nonelectronic realms can unlock unique advantages: Photonic chips, for instance, process information with light while generating little heat. Another compelling alternative is fluidics, which uses pressurized gases or liquids to build logic circuits. Pioneered in the 1960s but sidelined by microchips, the field reemerged in the 1990s as โmicrofluidics.โ This approach aims to shrink laboratories onto a single chip by creating microscopic fluid channels with integrated micropneumatic control systems. Today, there is a second fluidic revival, this time in the domain of soft robotics. Scaling microfluidic designs up to the millimeter-scale range (millifluidics) enables the higher flow rates necessary to drive robotic actuators. These robots exploit the nonlinear behaviors of soft materials to create lifelike motion and safer interactions, often utilizing pressurized air. By building systems that โthinkโ with the same air that powers them, we can drastically reduce the need for bulky electronic-to-pneumatic interfaces. This is the focus of my Soiboi Studio robotics lab. With millifluidic logic, I have steadily scaled the complexity of my designs. What began with a simple oscillator has most recently evolved into a clock featuring a soft, four-digit, seven-segment display. What Is Millifluidics? Building on microfluidics research from the early 2000s and recent developments from the Grover Lab at the University of California, Riverside, Iโve developed millifluidic devices using standard 3D printing and silicone casting. The basic architecture is simple: A flexible membrane is sandwiched between rigid layers embedded with networks of air channels. Just as electronics rely on differing voltage potentials, these fluidic circuits operate on the pressure difference between atmospheric pressure (logical 0) and a near-vacuum at around โ60 kilopascals of relative pressure (logical 1). Using negative pressure means the membrane is pulled into openings. This creates robust seals that allow me to replicate electronic building blocks. A cast silicone membrane forms the face of the clock [top], while behind it sits 3D-printed millifluidic blocks [middle rows]. An Arduino Uno controls driver boards that operate solenoids, which are connected to valves that are attached to a vacuum pump [bottom row].James Provost While fluidic resistors are easily realized by adjusting the channel geometry, the heart of the system is a valve that mimics a metal-oxide-semiconductor field-effect transistor, or MOSFET. This vacuum โtransistorโ features a flow layer with two chambers (the source and drain) divided by a central valve seat and a control layer containing a cavity (the gate). A membrane runs between the control and flow layers and normally prevents airflow between the source and drain chambers. To switch the transistor on, a vacuum is applied to the gate chamber, sucking the membrane into the cavity and lifting it off the seat. This opens a path for airflow, equivalent to closing an electric circuit. By adding a small aperture to the membrane, I created a check valveโthe fluidic equivalent of a diode. By combining transistors and resistive โpull-downโ channels, I can build a full suite of logic gates. The original microfluidic designs that inspired me were fabricated from etched glass and milled acrylic. Adapting them for a standard 3D printer required reengineering the logic elements and mastering two critical fabrication techniques. First, I need airtight prints, yet printed plastic is notoriously porous. By printing at elevated temperatures, slow speeds, and slight overextrusion, I was able to fill microscopic gaps. When youโre using transparent filament, thereโs a handy visual indicator: The more transparent the plastic appears, the lower its porosity. Second, I used glass for my print bed. By printing the upper and lower chambers directly against this bed, I got the interface surface to become mirror smooth. This finish is essential for creating reliable, airtight seals. A 0.3-millimeter silicone membrane is placed between the layers and secured with screws. How Does the Soft Clock Work? The clockface is a cast silicone membrane. Each digit segment is formed by a small underlying cavity. When air is evacuated from this cavity, the membrane is sucked inward to create a concave hollow; when atmospheric pressure is restored, the silicone pops back flush with the surface. The result is a mesmerizing, organic motion. The โbrainโ of the clock is an Arduino Uno, while the fluidics significantly reduce the hardware footprint. A four-digit, seven-segment display with two separator dots would require 29 solenoid valves to control directly. My clock needs just 11 valves. A pneumatic transistor is off when its upper control chamber is at atmospheric pressure [top]. When air is removed from the control chamber, it lifts a membrane, which allows air to flow between lower flow chambers and turns the transistor on [bottom]. James Provost To understand how it works, consider a standard electronic four-digit, seven-segment LED display. This also uses 11 pins to drive its digits. (In clockface displays, an additional pin is required to drive the separator dots.) Every digit is connected to a shared data bus with seven lines, one per segment. The four control lines select individual digits. Only one digit is illuminated at time, and strobing the digits at least 50 times per second creates the illusion that all four are simultaneously illuminated. Such high-speed switching is not possible with air. Instead, I rely on memory. Each segment acts like a capacitor: By evacuating its cavity (logic 1), you โchargeโ the segment; by restoring atmospheric pressure (logic 0), you discharge it. Hence, each digit acts as an independent 7-bit memory. If the system is sufficiently airtight, the segments maintain their state for several seconds. Like the electronic display, the system utilizes a seven-line data bus. Each line connects to a solenoid valve that provides either vacuum or atmospheric pressure. To selectively address the individual digits, I placed a fluidic transistor between each segment and its data line. All the transistorsโ control inputs for a given digit are combined into one โwrite enableโ line connected to its own solenoid valve. Activating this valve allows me to write data into the corresponding digitโs memory. The clock updates one digit per second, meaning a full cycle across the face takes 4 seconds. This cycle also drives the separator dots: A set of fluidic diodes connects the enable lines to the dotsโ cavities. Consequently, as each digit is addressed, the dots pulse automatically. This display is more than a clock; it is a soft robot that happens to tell time. By offloading computation to the same air that powers movement, the clock approaches a new class of machines that are simpler, lighter, and more integrated. Iโm now developing a guide for getting started with vacuum-powered logic and may release a refined version of this clock in the future. Watching the silicone skin morph serves as a fascinating reminder that not all logic needs silicon; sometimes, all you need is flexible silicone and a flow of air. This article appears in the June 2026 print issue as โThe Soft Clock.โ
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Created from fabric scraps that would otherwise end up in a landfill, this thoughtfully constructed bag looks great and can carry everything you need for a weeklong trip.
Luxome partners with LiquiDonate to donate returned weighted blankets to nonprofits, reducing landfill waste with AI-driven solutions.
As firms find ROI elusive, Indiaโs tech giants are betting they can fill the AI โdeployment gapโ for U.S. clients, before automation eats their own back-office business.
Stord offers a network of physical warehouses and inventory management software for e-commerce. It bills itself as a sort of anti-Amazon, giving brands "the speed to compete" while still owning their customer relationships.
Patients who use mobile applications to manage medical conditions including depression and chronic pain might assume the apps have been evaluated by regulatory agencies to be safe and effective. But that isnโt necessarily the case. Most of the more than 55,000 medical apps that claim to diagnose or treat a conditionโor ones that provide clinical decision support, known as โtherapeuticโ appsโhave never been assessed by any trusted neutral bodies or regulatory agencies to evaluate them for technical soundness, ethical design, or clinical benefit. The apps often donโt comply with regional data security and privacy laws to protect peopleโs sensitive health information. Medical apps differ from traditional wellness apps, which provide users with insights into becoming healthier by, for example, tracking fitness activities, monitoring blood pressure, and analyzing sleep patterns. There is no reliable way to verify that therapeutic apps deliver the results they indicate. To help ensure such apps are credible, the IEEE Standards Association (IEEE SA) recently launched the IEEE Global Medical Mobile App Assessment and Registry. The publicly searchable directory is designed to list apps that have been vetted by experts across several criteria including technical soundness, ethical design, compliance with data security and privacy regulations, and clinical efficacy, which is evidence of a clinical benefit for the patient. โPatients, clinicians, payers, and health care systems often struggle to distinguish clinically meaningful therapeutic apps from those that are simply well-marketed,โ says IEEE Senior Member Yuri Quintana, chair of the assessment and registry program. He is chief of the clinical informatics division at Beth Israel Deaconess Medical Center, in Boston. โOur goal is to establish a standardized review method using criteria developed by experts.โ Why regulation is lacking Because the apps are intended for medical use without being part of a medical implement, they fall under the designation of software as a medical device (SaMD), according to the International Medical Device Regulators Forum. SaMD is supposed to be regulated by public health agencies such as the U.S. Food and Drug Administration, but the apps have developed and grown in popularity so quickly that regulators havenโt been able to keep up, Quintana says. Some companies have received approval, but most have not, he says. Many users are unaware of the regulatory gap, he says. โSeeing an app from a well-known company often creates the impression that it has been meaningfully vetted for safety and efficacy, even when that is not the case,โ he says. Some companies are using deceptive advertising to sell their product, he adds. Marketing materials might claim that all of a companyโs health apps are certified, even though only one app has been approved by a regulatory body to treat a particular condition. Or the verbiage might imply the company has clinical evidence proving its application works, even though the app has never been tested independently. Another concern is that updated apps arenโt being vetted, says Maria Palombini, IEEE SAโs director of health care and life sciences global practice lead. โThe original app might have received approval from a regulatory agency, but not the updated version,โ Palombini says. โThere could have been significant changes from the original.โ โNot every medical-related app triggers the same regulatory classification or review across jurisdictions,โ Quintana adds. โThat leaves a large gray zone of clinically relevant but lower-risk apps that havenโt undergone an independent assessment. The IEEE registry was created to help fill these gaps. โIEEE is the best organization to address this problem because this is fundamentally a standards, trust, interoperability, and conformity assessment challenge,โ he says. IEEE โis the worldโs largest technical professional organization, with deep expertise in developing globally recognized standards including in health care, cybersecurity, AI ethics, and interoperability.โ โThrough the IEEE Conformity Assessment Program, we already run rigorous assessment and registry programs,โ Palombini says. โOur neutral, consensus-driven, multidisciplinary approachโbringing together clinicians, regulators, developers, and ethicists without commercial biasโmakes IEEE uniquely positioned to create trustworthy global guardrails that can scale across jurisdictions and support regulatory harmonization.โ How the registry works The assessment framework was developed by a multidisciplinary group of 35 volunteer experts from 10 countries, Quintana says. The panel includes academics, AI experts, app developers, clinicians, ethicists, mental health experts, patient advocates, regulators, researchers, technologists, and those who assess safety in health care. The registry is for any app used for clinical care or therapeutics that claims to demonstrate a medical benefit. That includes apps designed for cardiology, diabetes, mental health, neurology, oncology, rehabilitation, and respiratory diseases, Quintana says. Initially, he says, the focus will be on apps that aim to treat mental health conditions, given the large number of offerings in that area and the registry committeeโs expertise. The submission of apps is voluntary. There is no government mandate that requires a company to use the IEEE registry. The products will be evaluated against about 150 consensus-based criteria across three major areas: Clinical efficacy including therapeutic effectiveness, any sustained benefits, risk management, comparison to standard care, user engagement, and real clinical value. Technical soundness including accessibility, privacy and security, error handling, interoperability, AI governance, usability, and operational quality. Ethical design including bias prevention, patient consent, data governance, conflict-of-interest transparency, responsible use of AI and large language models, and prioritization of public health benefits. IEEE charges a nonrefundable submission fee that covers the cost of the assessment plus the registryโs annual subscription for the first year. Developers first must demonstrate they are a legally established entity before they can complete the app publisher registration form and then submit documentation and attestations about the product. The IEEE review of an app is estimated to take six to eight weeks, Palombini says. The assessment results will be privately shared with the app publisher, she says, and to be listed in the registry, an app must achieve more than 85 percent compliance in each category. Upgraded apps must be submitted and reassessed, Palombini says. Similar to how users are notified when an app on their smart devices has , the registry will be notified when listed apps have a new update available, she says. Applicants who do not pass the assessment are to receive feedback explaining why. They will be given an opportunity to make changes or provide additional documentation, Palombini says. โItโs a pretty methodological process, with checks and balances,โ Quintana says. โWeโre being very transparent about the process.โ Approved apps added to the registry receive an IEEE certification badge and submission identifier, which the company can display on its website, app store listings, and marketing materials. โThe badge serves as visible proof that the app has met the independent, consensus-based assessment for clinical value, technical robustness, and ethical design,โ Quintana says. The registry will be publicly available at no cost, he says. Patients and families seeking safe, trustworthy appsโand payers and insurers evaluating reimbursement potentialโwill find the registry helpful, he says. The application website is open. The public registry page does not yet list a specific count of approved apps because assessments are ongoing. Approved apps and their unique identifiers are to be published when the initial reviews are completed. To learn more, you can watch a webinar recorded in March. The assessment framework that underpins the registry is supporting the formal recognition of IEEE P3962 Standard for Criteria Assessment Framework f
Google is transforming Search from a list of links into an AI-powered experience filled with conversational answers, autonomous agents, and interactive interfaces โ a shift that could further reduce traffic to publishers across the web.
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Editorโs note: If youโd like to pinpoint the instant when the world entered the nuclear age, 5:29:45 a.m. Mountain War Time on 16 July 1945, is an excellent choice. That was the moment when human beings first unleashed the power of the nucleus in an immense, blinding ball of fire above a gloomy stretch of desert in the Jornada del Muerto basin in New Mexico. Emily Seylโs Trinity: An Illustrated History of the Worldโs First Atomic Test (The University of Chicago Press) offers hundreds of startlingly vivid photographs of the Manhattan Project that emerged from a 20-year restoration effort. This excerpt and the accompanying photos record the massive effort to capture the awesome detonation of โthe Gadget.โ aspect_ratioReprinted with permission from Trinity: An Illustrated History of the Worldโs First Atomic Test by Emily Seyl with contributions by Alan B. Carr, published by The University of Chicago Press. ยฉ 2026 by The University of Chicago. All rights reserved. In the North 10,000 photography bunker, Berlyn Brixner was listening to the countdown on a loudspeaker, his head inside a turret loaded with cameras and film. He was one of the only people instructed to look toward the blastโthrough his welderโs glassesโready to follow the path of the fireball as it launched into the sky. The two Mitchell movie cameras at his station would deliver the best footage to come of the Trinity test, used by Los Alamos scientists to make some of the first measurements of the effects of a nuclear explosion. Related: New Trinity Book Uncovers Images of the First Atomic Test When the detonators fired, the cameras captured what Brixner could not have seenโthe very first light of a violent, silent sea of energy unfurling into the basin. As 32 blocks of high explosives erupted all together, their incredible force surged inward toward the sleeping plutonium core, compressing the dense sphere of metal instantaneously from all sides and bringing its atoms impossibly close together. A carefully timed burst of neutrons sowed momentary, uncontrolled chaos, and then, as quickly as it began, the fission chain reaction ended. Footage from a high-speed Fastax camera in Brixnerโs bunker, shot through a thick glass porthole, shows a translucent orb bursting through the darkness less than a hundredth of a second after detonation, as a rush of heat, light, and matter blew apart the Gadget. When the brightness faded enough for witnesses to make out ground zero, they saw a wall of dust rise up around a brilliant, shape-shifting, multicolored ball of flamesโforming a fiery cloud that shot into the sky atop a twisting stream of debris. The camera footage tells a story no less dramatic but hundreds of times more intricate, preserving the moment for scientists to return to again and again to measure and describe the behavior of the fireball and other visible effects with exacting detail. On balance, the photography effort was a huge success, despite only 11 of the 52 cameras producing satisfactory images. By arranging those cameras at intentionally staggered distances, complementary angles, and with a broad spectrum of frame rates and focal lengths, the Spectrographic and Photographic Measurements Group was able to piece together a remarkably complete picture of their subject. On 12 July 1945, Herbert Lehr, a U.S. Army sergeant and electrical engineer assigned to Los Alamos, delivered the plutonium core to the McDonald ranch house, where the bomb was assembled. Los Alamos National Laboratory According to the groupโs leader, Julian Mack, the more than 100,000 frames that were captured still โgive no idea of the brightness, or of time and space scales.โ Mack attributed fortune, as much as foresight, to the photographic record that was made, especially during the earliest phase of the blast. Indeed, the explosion was several times more powerful than predicted, and the intensity of its effects overwhelmed many of the cameras and diagnostic instruments. The human observers were similarly overcome. โThe shot was truly awe-inspiring,โ said Norris Bradbury, the physicist who would succeed Robert Oppenheimer as director of Los Alamos. โMost experiences in life can be comprehended by prior experiences, but the atom bomb did not fit into any preconception possessed by anybody. The most startling feature was the intense light.โ Norris Bradbury, the physicist responsible for the final assembly of the Gadget, stands next to the partially assembled bomb at the top of the shot tower. The cables on the outside of the bomb would transmit the signals to trigger the synchronized detonations of conventional explosives, which would then create the inward-directed shock wave that would compress the bombโs plutonium core. Bradbury would go on to succeed Robert Oppenheimer as director of Los Alamos on 17 October 1945.Los Alamos National Laboratory It is a common sentiment that words and even pictures pale in comparison to the experience of the explosion. Even so, soldiers, scientists, and many other witnesses have added their firsthand accountsโoften absorbing and poeticโto complement the trove of hard data collected during the test shot. They describe an intense and blinding brightness that filled the basin with daytime; an ominous, darkening cloud rearing its head in eerie silence; the wait for the invisible wave rushing out from the heart of the Gadget; and the mighty roar that arrived at last, in a thunder, and seemed never to leave. Physicist Isidor Isaac Rabi, watching from 20 miles away, remembered, โIt blasted; it pounced; it bored its way right through you.โ James Chadwick, head of the British contingent of scientists who joined the Manhattan Project, later said, โAlthough I had lived through this moment in my imagination many times during the past few years and everything happened almost as I had pictured it, the reality was shattering.โ The blast, captured with an assortment of high-speed and motion-picture cameras, shows the fireball expanding between 25 milliseconds and 60 seconds, by which time the mushroom cloud is over 3 kilometers high.Los Alamos National Laboratory And physicist George Kistiakowsky found himself certain that โat the end of the worldโin the last millisecond of the Earthโs existenceโthe last human will see what we saw.โ
Many of the worldโs most advanced electronic systemsโincluding Internet routers, wireless base stations, medical imaging scanners, and some artificial intelligence toolsโdepend on field-programmable gate arrays. Computer chips with internal hardware circuits, the FPGAs can be reconfigured after manufacturing. On 12 March, an IEEE Milestone plaque recognizing the first FPGA was dedicated at the Advanced Micro Devices campus in San Jose, Calif., the former Xilinx headquarters and the birthplace of the technology. The FPGA earned the Milestone designation because it introduced iteration to semiconductor design. Engineers could redesign hardware repeatedly without fabricating a new chip, dramatically reducing development risk and enabling faster innovation at a time when semiconductor costs were rising rapidly. The ceremony, which was organized by the IEEE Santa Clara Valley Section, brought together professionals from across the semiconductor industry and IEEE leadership. Speakers at the event included Stephen Trimberger, an IEEE and ACM Fellow whose technical contributions helped shape modern FPGA architecture. Trimberger reflected on how the invention enabled software-programmable hardware. Solving computingโs flexibility-performance tradeoff FPGAs emerged in the 1980s to address a core limitation in computing. A microprocessor executes software instructions sequentially, making it flexible but sometimes too slow for workloads requiring many operations at once. At the other extreme, application-specific integrated circuits are chips designed to do only one task. ASICs achieve high efficiency but require lengthy development cycles and nonrecurring engineering costs, which are large, upfront investments. Expenses include designing the chip and preparing it for manufacturingโa process that involves creating detailed layouts, building masks for the fabrication machines, and setting up production lines to handle the tiny circuits. โASICs can deliver the best performance, but the development cycle is long and the nonrecurring engineering cost can be very high,โ says Jason Cong, an IEEE Fellow and professor of computer science at the University of California, Los Angeles. โFPGAs provide a sweet spot between processors and custom silicon.โ Congโs foundational work in FPGA design automation and high-level synthesis transformed how reconfigurable systems are programmed. He developed synthesis tools that translate C/C++ into hardware designs, for example. At the heart of his work is an underlying principle first espoused by electrical engineer Ross Freeman: By configuring hardware using programmable memory embedded inside the chip, FPGAs combine hardware-level speed with the adaptability traditionally associated with software. Silicon Valley origins: the first FPGA The FPGA architecture originated in the mid-1980s at Xilinx, a Silicon Valley company founded in 1984. The invention is widely credited to Freeman, a Xilinx cofounder and the startupโs CTO. He envisioned a chip with circuitry that could be configured after fabrication rather than fixed permanently during creation. Articles about the history of the FPGA emphasize that he saw it as a deliberate break from conventional chip design. At the time, semiconductor engineers treated transistors as scarce resources. Custom chips were carefully optimized so that nearly every transistor served a specific purpose. Freeman proposed a different approach. He figured Mooreโs Law would soon change chip economics. The principle holds that transistor counts roughly double every two years, making computing cheaper and more powerful. Freeman posited that as transistors became abundant, flexibility would matter more than perfect efficiency. He envisioned a device composed of programmable logic blocks connected through configurable routingโa chip filled with what he described as โopen gates,โ ready to be defined by users after manufacturing. Instead of fixing hardware in silicon permanently, engineers could configure and reconfigure circuits as requirements evolved. Freeman sometimes compared the concept to a blank cassette tape: Manufacturers would supply the medium, while engineers determined its function. The analogy captured a profound shift in who controls the technology, shifting hardware design flexibility from chip fabrication facilities to the system designers themselves. In 1985 Xilinx introduced the first FPGA for commercial sale: the XC2064. The device contained 64 configurable logic blocksโsmall digital circuits capable of performing logical operationsโarranged in an 8-by-8 grid. Programmable routing channels allowed engineers to define how signals moved between blocks, effectively wiring a custom circuit with software. Fabricated using a 2-micrometer process (meaning that 2 ยตm was the minimum size of the features that could be patterned onto silicon using photolithography), the XC2064 implemented a few thousand logic gates. Modern FPGAs can contain hundreds of millions of gates, enabling vastly more complex designs. Yet the XC2064 established a design workflow still used today: Engineers describe the hardware behavior digitally and then โcompile the design,โ a process that automatically translates the plans into the instructions the FPGA needs to set its logic blocks and wiring, according to AMD. Engineers then load that configuration onto the chip. The breakthrough: hardware defined by memory Earlier programmable logic devices, such as erasable programmable read-only memory, or EPROM, allowed limited customization but relied on largely fixed wiring structures that did not scale well as circuits grew more complex, Cong says. FPGAs introduced programmable interconnectsโnetworks of electronic switches controlled by memory cells distributed across the chip. When powered on, the device loads a bitstream configuration file that determines how its internal circuits behave. โAs process technology improved and transistor counts increased, the cost of programmability became much less significant,โ Cong says. From โglue logicโ to essential infrastructure โInitially, FPGAs were used as what engineers called glue logic,โ Cong says. Glue logic refers to simple circuits that connect processors, memory, and peripheral devices so the system works reliably, according to PC Magazine. In other words, it โgluesโ different components together, especially when interfaces change frequently. Early adopters recognized the advantage of hardware that could adapt as standards evolved. In โThe History, Status, and Future of FPGAs,โ published in Communications of the ACM, engineers at Xilinx and organizations such as Bell Labs, Fairchild Semiconductor, IBM, and Sun Microsystems said the earliest uses of FPGAs were for prototyping ASICs. They also used it for validating complex systems by running their software before fabrication, allowing the companies to deploy specialized products manufactured in modest volumes. Those uses revealed a broader shift: Hardware no longer needed to remain fixed once deployed. Attendees at the Milestone plaque dedication ceremony included (seated L to R) 2025 IEEE President Kathleen Kramer, 2024 IEEE President Tom Coughlin, and Santa Clara Valley Section Milestones Chair Brian Berg.Douglas Peck/AMD Semiconductor economics changed the equation The rise of FPGAs closely followed changes in semiconductor economics, Cong says. Developing a custom chip requires a large upfront investment before production begins. As fabrication costs increased, products had to ship in large quantities to make ASIC development economically viable, according to a post published by AnySilicon. FPGAs allowed designers to move forward without that larger monetary commitment. ASIC development typically requires 18 to 24 months from conception to silicon, while FPGA implementations often can be completed within three to six months using modern design tools, Cong says. The shorter cycle and the ability to reconfigure the hardware enabled startups, universities, and equipment manufacturers to experiment with advanced architectures that were previously accessible mainly to large chip companies. Lookup tables and the rise of reconfigurable computing A popular technique for implementing mathematical functions in hardware is the lookup table (LUT). A LUT is a small memory element that stores the results of logical operations, according to โLUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs,โ a paper selected for presentation next month at the 34th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). Instead of repeatedly recalculating outcomes, the chip retrieves answers directly from memory. Cong compares the approach to consulting multiplication tables rather than recomputing the arithmetic each time. Research led by Cong and others helped develop efficient methods for mapping digital circuits onto LUT-based architectures, shaping routing and layout strategies used in modern devices. As transistor budgets expanded, FPGA vendors integrated memory blocks, digital signal-processing units, high-speed communication interfaces, cryptographic engines, and embedded processors, transforming the devices into versatile computing platforms. Why the gate arrays are distinct from CPUs, GPUs, and ASICs FPGAs coexist with other processors because each one optimizes different priorities. Central processing units excel at general computing. Graphics processing units, designed to perform many calculations simultaneously, dominate large parallel workloads such as AI training. ASICs provide maximum efficiency when designs remain stable and production volumes are high. โASICs can deliver the best performance, but the development cycle is long, and the nonrecurring engineering cost can be very high. FPGAs provide a sweet spot between processors and custom silicon.โ โJason Cong, IEEE Fellow and professor of computer science at UCLA. โFPGAs are not replacements for CPUs or GPUs,โ Cong says. โThey complement those processors in heterogeneous computing systems.โ Modern computing platforms increasingly combine multiple types of processors to balance flexibility, performance, and energy efficiency. A Milestone for an idea, not just a device This IEEE Milestone recognizes more than a successful semiconductor product. It also acknowledges a shift in how engineers innovate. Reconfigurable hardware allows designers to test ideas quickly, refine architectures, and deploy systems while standards and markets evolve. โWithout FPGAs,โ Cong says, โthe pace of hardware innovation would likely be much slower.โ Four decades after the first FPGA appeared, the technologyโs enduring legacy reflects Freemanโs insight: Hardware did not need to remain fixed. By accepting a small amount of unused silicon in exchange for adaptability, engineers transformed chips from static products into platforms for continuous experimentationโturning silicon itself into a medium engineers could rewrite. Among those who attended the Milestone ceremony were 2025 IEEE President Kathleen Kramer; 2024 IEEE President Tom Coughlin; Avery Lu, chair of the IEEE Santa Clara Valley Section; and Brian Berg, history and milestones chair of IEEE Region 6. They joined AMDโs chief executive, Lisa Su, and Salil Raje, senior vice president and general manager of adaptive and embedded computing at AMD. The IEEE Milestone plaque honoring the field-programmable gate array reads: โThe FPGA is an integrated circuit with user-programmable Boolean logic functions and interconnects. FPGA inventor Ross Freeman cofounded Xilinx to productize his 1984 invention, and in 1985 the XC2064 was introduced with 64 programmable 4-input logic functions. Xilinxโs FPGAs helped accelerate a dramatic industry shift wherein โfablessโ companies could use software tools to design hardware while engaging โfoundryโ companies to handle the capital-intensive task of manufacturing the software-defined hardware.โ Administered by the IEEE History Center and supported by donors, the IEEE Milestone program recognizes outstanding technical developments worldwide that are at least 25 years old. Check out Spectrumโs History of Technology channel to read more stories about key engineering achievements.
Quantum computing is a devilishly complex technology, with many technical hurdles impacting its development. Of these challenges two critical issues stand out: miniaturization and qubit quality. IBM has adopted the superconducting qubit road map of reaching a 1,121-qubit processor by 2023, leading to the expectation that 1,000 qubits with todayโs qubit form factor is feasible. However, current approaches will require very large chips (50 millimeters on a side, or larger) at the scale of small wafers, or the use of chiplets on multichip modules. While this approach will work, the aim is to attain a better path toward scalability. Now researchers at MIT have been able to both reduce the size of the qubits and done so in a way that reduces the interference that occurs between neighboring qubits. The MIT researchers have increased the number of superconducting qubits that can be added onto a device by a factor of 100. โWe are addressing both qubit miniaturization and quality,โ said William Oliver, the director for the Center for Quantum Engineering at MIT. โUnlike conventional transistor scaling, where only the number really matters, for qubits, large numbers are not sufficient, they must also be high-performance. Sacrificing performance for qubit number is not a useful trade in quantum computing. They must go hand in hand.โ The key to this big increase in qubit density and reduction of interference comes down to the use of two-dimensional materials, in particular the 2D insulator hexagonal boron nitride (hBN). The MIT researchers demonstrated that a few atomic monolayers of hBN can be stacked to form the insulator in the capacitors of a superconducting qubit. Just like other capacitors, the capacitors in these superconducting circuits take the form of a sandwich in which an insulator material is sandwiched between two metal plates. The big difference for these capacitors is that the superconducting circuits can operate only at extremely low temperaturesโless than 0.02 degrees above absolute zero (-273.15 ยฐC). Superconducting qubits are measured at temperatures as low as 20 millikelvin in a dilution refrigerator.Nathan Fiske/MIT In that environment, insulating materials that are available for the job, such as PE-CVD silicon oxide or silicon nitride, have quite a few defects that are too lossy for quantum computing applications. To get around these material shortcomings, most superconducting circuits use what are called coplanar capacitors. In these capacitors, the plates are positioned laterally to one another, rather than on top of one another. As a result, the intrinsic silicon substrate below the plates and to a smaller degree the vacuum above the plates serve as the capacitor dielectric. Intrinsic silicon is chemically pure and therefore has few defects, and the large size dilutes the electric field at the plate interfaces, all of which leads to a low-loss capacitor. The lateral size of each plate in this open-face design ends up being quite large (typically 100 by 100 micrometers) in order to achieve the required capacitance. In an effort to move away from the large lateral configuration, the MIT researchers embarked on a search for an insulator that has very few defects and is compatible with superconducting capacitor plates. โWe chose to study hBN because it is the most widely used insulator in 2D material research due to its cleanliness and chemical inertness,โ said colead author Joel Wang, a research scientist in the Engineering Quantum Systems group of the MIT Research Laboratory for Electronics. On either side of the hBN, the MIT researchers used the 2D superconducting material, niobium diselenide. One of the trickiest aspects of fabricating the capacitors was working with the niobium diselenide, which oxidizes in seconds when exposed to air, according to Wang. This necessitates that the assembly of the capacitor occur in a glove box filled with argon gas. While this would seemingly complicate the scaling up of the production of these capacitors, Wang doesnโt regard this as a limiting factor. โWhat determines the quality factor of the capacitor are the two interfaces between the two materials,โ said Wang. โOnce the sandwich is made, the two interfaces are โsealedโ and we donโt see any noticeable degradation over time when exposed to the atmosphere.โ This lack of degradation is because around 90 percent of the electric field is contained within the sandwich structure, so the oxidation of the outer surface of the niobium diselenide does not play a significant role anymore. This ultimately makes the capacitor footprint much smaller, and it accounts for the reduction in cross talk between the neighboring qubits. โThe main challenge for scaling up the fabrication will be the wafer-scale growth of hBN and 2D superconductors like [niobium diselenide], and how one can do wafer-scale stacking of these films,โ added Wang. Wang believes that this research has shown 2D hBN to be a good insulator candidate for superconducting qubits. He says that the groundwork the MIT team has done will serve as a road map for using other hybrid 2D materials to build superconducting circuits.